AT91M63200-25AI Atmel, AT91M63200-25AI Datasheet - Page 115

• Manufacturer Part Number: AT91M63200-25AI
• Description: IC ARM7 MCU 176 TQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M63200-25AI

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-TQFP, 176-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Capture Operating Mode
This mode is entered by clearing the WAVE parameter in
TC_CMR (Channel Mode Register). Capture mode allows
the TC channel to perform measurements such as pulse
timing, frequency, period, duty cycle and phase on TIOA
and TIOB signals which are considered as input.
Figure 56 shows the configuration of the TC channel when
programmed in capture mode.
Capture Registers A and B (RA and RB)
Registers A and B are used as capture registers. This
means that they can be loaded with the counter value when
a programmable event occurs on the signal TIOA.
The parameter LDRA in TC_CMR defines the TIOA edge
for the loading of Register A, and the parameter LDRB
defines the TIOA edge for the loading of Register B.
RA is loaded only if it has not been loaded since the last
trigger or if RB has been loaded since the last loading of
RA.
RB is loaded only if RA has been loaded since the last trig-
ger or the last loading of RB.
Loading RA or RB before the read of the last value loaded
sets the Overrun Error Flag (LOVRS) in TC_SR (Status
Register). In this case, the old value is overwritten.
Trigger Conditions
In addition to the SYNC signal, the software trigger and the
RC compare trigger, an external trigger can be defined.
Bit ABETRG in TC_CMR selects input signal TIOA or TIOB
as an external trigger. Parameter ETRGEDG defines the
edge (rising, falling or both) detected to generate an exter-
nal trigger. If ETRGEDG = 0 (none), the external trigger is
disabled.
Status Register
The following bits in the status register are significant in
capture operating mode.
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CPCS: RC Compare Status
There has been an RC Compare match at least once
since the last read of the status.
COVFS: Counter Overflow Status
The counter has attempted to count past $FFFF since
the last read of the status.
LOVRS: Load Overrun Status
RA or RB has been loaded at least twice without any
read of the corresponding register, since the last read of
the status.
LDRAS: Load RA Status
RA has been loaded at least once without any read,
since the last read of the status.
LDRBS: Load RB Status
RB has been loaded at least once without any read,
since the last read of the status.
ETRGS: External Trigger Status
An external trigger on TIOA or TIOB has been detected
since the last read of the status.
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