UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 101

• Manufacturer Part Number: UPSD3433E-40T6
• Description: MCU 8BIT 8032 128KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4906

UPSD3422, UPSD3433, UPSD3434, UPSD3454
20.6.1
20.6.2
Note:
Capture mode
In Capture mode there are two options which are selected by the bit EXEN2 in T2CON.
Figure 27 on page 105
If EXEN2 = 0, then Timer 2 is a 16-bit timer if C/T2 = 0, or it is a 16-bit counter if C/T2 = 1,
either of which sets the interrupt flag bit TF2 upon overflow.
If EXEN2 = 1, then Timer 2 still does the above, but with the added feature that a 1-to-0
transition at external input pin T2X causes the current value in the Timer 2 registers, TL2
and TH2, to be captured into registers RCAP2L and RCAP2H, respectively. In addition, the
transition at T2X causes interrupt flag bit EXF2 in T2CON to be set. Either flag TF2 or EXF2
will generate an interrupt and the MCU must read both flags to determine the cause. Flags
TF2 and EXF2 are not automatically cleared by hardware, so the firmware servicing the
interrupt must clear the flag(s) upon exit of the interrupt service routine.
Auto-reload mode
In the Auto-reload mode, there are again two options, which are selected by the bit EXEN2
in T2CON.
If EXEN2 = 0, then when Timer 2 counts up and rolls over from FFFFh it not only sets the
interrupt flag TF2, but also causes the Timer 2 registers to be reloaded with the 16-bit value
contained in registers RCAP2L and RCAP2H, which are preset with firmware.
If EXEN2 = 1, then Timer 2 still does the above, but with the added feature that a 1-to-0
transition at external input T2X will also trigger the 16-bit reload and set the interrupt flag
EXF2. Again, firmware servicing the interrupt must read both TF2 and EXF2 to determine
the cause, and clear the flag(s) upon exit.
The UPSD34xx does not support selectable up/down counting in Auto-reload mode (this
feature was an extension to the original 8032 architecture).
Table 60.
Table 61.
Bit 7
TF2
Bit
7
6
5
Figure 28 on page 106
T2CON: Timer 2 control register (SFR C8h, reset value 00h)
T2CON register bit definition
Symbol
RCLK
EXF2
EXF2
Bit 6
TF2
(1)
illustrates Capture mode.
RCLK
Bit 5
R/W
R,W
R,W
R,W
shows Auto-reload mode.
Timer 2 flag, causes interrupt if enabled.
TF2 is set by hardware upon overflow. Must be cleared by
firmware. TF2 will not be set when either RCLK or TCLK =1.
Timer 2 flag, causes interrupt if enabled.
EXF2 is set when a capture or reload is caused by a negative
transition on T2X pin and EXEN2 = 1. EXF2 must be cleared
by firmware.
UART0 Receive Clock control.
When RCLK = 1, UART0 uses Timer 2 overflow pulses for its
receive clock in Modes 1 and 3. RCLK=0, Timer 1 overflow is
used for its receive clock
TCLK
Bit 4
EXEN2
Bit 3
Definition
Standard 8032 timer/counters
Bit 2
TR2
Bit 1
C/T2
CP/RL2
Bit 0
101/300