UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 121

• Manufacturer Part Number: UPSD3433E-40T6
• Description: MCU 8BIT 8032 128KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4906

UPSD3422, UPSD3433, UPSD3434, UPSD3454
22.2
Table 73.
Pulse width selection
The IrDA interface has two ways to modulate the standard UART1 serial stream:
1.
2.
The PULSE bit in the SFR named IRDACON determines which method above will be used.
According to the IrDA physical layer specification, for all baud rates at 115.2k bps and below,
the minimum data pulse width is 1.41µs. For a baud rate of 115.2k bps, the maximum pulse
width 2.23µs. If a constant pulse width is to be used for all baud rates (PULSE bit = 0), the
ideal general pulse width is 1.63µs, derived from the bit time of the fastest baud rate (8.68µs
bit time for 115.2k bps rate), multiplied by the proportion, 3/16.
To produce this fixed data pulse width when the PULSE bit = 0, a prescaler is needed to
generate an internal reference clock, SIRClk, shown in
derived by dividing the oscillator clock frequency, f
SFR named IRDACON. A divisor must be chosen to produce a frequency for SIRClk that
lies between 1.34 MHz and 2.13 MHz, but it is best to choose a divisor value that produces
SIRClk frequency as close to 1.83MHz as possible, because SIRClk at 1.83MHz will
produce an fixed IrDA data pulse width of 1.63µs.
for CDIV[4:0] based on several different values of f
For reference, SIRClk of 2.13MHz will generate a fixed IrDA data pulse width of 1.41 µs, and
SIRClk of 1.34MHz will generate a fixed data pulse width of 2.23 µs.
An IrDA data pulse will have a constant pulse width for any bit time, regardless of the
selected baud rate.
An IrDA data pulse will have a pulse width that is proportional to the the bit time of the
selected baud rate. In this case, an IrDA data pulse width is 3/16 of its bit time, as
shown in
BR3
0
0
0
0
0
0
0
0
1
1
1
1
1
Baud rate of UART#1 for IrDA interface
Figure 39 on page
BR2
0
0
0
0
1
1
1
1
0
0
0
0
1
119.
BR1
0
0
1
1
0
0
1
1
0
0
1
1
0
Table 74
OSC,
OSC
.
using the five bits CDIV[4:0] in the
Figure 38 on page
provides recommended values
BR0
0
1
0
1
0
1
0
1
0
1
0
1
0
119. SIRClk is
Baud rate (kbps)
IrDA interface
115.2
57.5
38.4
19.2
14.4
12.8
9.6
7.2
4.8
3.6
2.4
1.8
1.2
121/300