MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 163

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MC68HC908GP32
MOTOROLA
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NEG opr,SP
NOP
NSA
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ORA opr,SP
ORA opr,SP
PSHA
PSHH
PSHX
PULA
PULH
PULX
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROL opr,SP
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
ROR opr,SP
RSP
RTI
RTS
Source
Form
Negate (Two’s Complement)
No Operation
Nibble Swap A
Inclusive OR A and M
Push A onto Stack
Push H onto Stack
Push X onto Stack
Pull A from Stack
Pull H from Stack
Pull X from Stack
Rotate Left through Carry
Rotate Right through Carry
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
•
MC68HC08GP32
Operation
Table 10-1. Instruction Set Summary (Continued)
—
Rev. 6
Central Processor Unit (CPU)
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← SP + 1 ; Pull ( PCH)
Push (A); SP ← (SP ) – 1
Push (H) ; SP ← (SP ) – 1
SP ← SP + 1; Pull (PCL)
Push (X) ; SP ← (SP ) – 1
SP ← (SP + 1); Pull ( A )
SP ← (SP + 1); Pull ( H )
SP ← (SP + 1); Pull ( X )
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
C
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
A ← –(A) = $00 – (A)
X ← –(X) = $00 – (X)
b7
A ← (A[3:0]:A[7:4])
Description
A ← (A) | (M)
b7
SP ← $FF
None
b0
b0
C
V H I N Z C
↕ – – ↕ ↕ ↕
↕ – – ↕ ↕ ↕
↕ – – ↕ ↕ ↕
↕ ↕ ↕ ↕ ↕ ↕ INH
– – – – – – INH
– – – – – – INH
0 – – ↕ ↕ –
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
Effect on
CCR
Central Processor Unit (CPU)
Instruction Set Summary
DIR
INH
INH
IX1
IX
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
Technical Data
9EEA
9EDA
9E60
9E69
9E66
CA
9D
AA
BA
DA
EA
9C
30
40
50
60
70
62
FA
87
8B
89
86
8A
88
39
49
59
69
79
36
46
56
66
76
80
81
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
dd
ff
ff
161
4
1
1
4
3
5
1
3
2
3
4
4
3
2
4
5
2
2
2
2
2
2
4
1
1
4
3
5
4
1
1
4
3
5
1
7
4