MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 340

IC MCU 8MHZ 32K FLASH 40-DIP

MC68HC908GP32CP

Manufacturer Part Number
MC68HC908GP32CP
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GP32CP
Manufacturer:
ROCKWELL
Quantity:
201
Part Number:
MC68HC908GP32CP
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Timebase Module (TBM)
21.6 Interrupts
Technical Data
338
NOTE:
Do not change TBR2:TBR0 bits while the timebase is enabled
(TBON = 1).
TACK — Timebase ACKnowledge
TBIE — Timebase Interrupt Enabled
TBON — Timebase Enabled
The timebase module can interrupt the CPU on a regular basis with a
rate defined by TBR2:TBR0. When the timebase counter chain rolls
over, the TBIF flag is set. If the TBIE bit is set, enabling the timebase
interrupt, the counter chain overflow will generate a CPU interrupt
request.
Interrupts must be acknowledged by writing a logic 1 to the TACK bit.
The TACK bit is a write-only bit and always reads as 0. Writing a logic
1 to this bit clears TBIF, the timebase interrupt flag bit. Writing a logic
0 to this bit has no effect.
This read/write bit enables the timebase interrupt when the TBIF bit
becomes set. Reset clears the TBIE bit.
This read/write bit enables the timebase. Timebase may be turned off
to reduce power consumption when its function is not necessary. The
counter can be initialized by clearing and then setting this bit. Reset
clears the TBON bit.
1 = Clear timebase interrupt flag
0 = No effect
1 = Timebase interrupt enabled
0 = Timebase interrupt disabled
1 = Timebase enabled
0 = Timebase disabled and the counter initialized to 0s
Timebase Module (TBM)
MC68HC908GP32
MC68HC08GP32
MOTOROLA
Rev. 6

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