MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 175

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MCHC908GR8AVFAE

Manufacturer Part Number
MCHC908GR8AVFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8AVFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8AVFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 15
Serial Peripheral Interface (SPI) Module
15.1 Introduction
This section describes the serial peripheral interface (SPI) module, which allows full-duplex,
synchronous, serial communications with peripheral devices.
The text that follows describes the SPI. The SPI I/O pin names are SS (slave select), SPSCK (SPI serial
clock), MOSI (master out slave in), and MISO (master in/slave out). The SPI shares four I/O pins with four
parallel I/O ports.
15.2 Features
Features of the SPI module include:
15.3 Functional Description
The SPI module allows full-duplex, synchronous, serial communication between the MCU and peripheral
devices, including other MCUs. Software can poll the SPI status flags or SPI operation can be interrupt
driven.
If a port bit is configured for input, then an internal pullup device may be enabled for that port bit.
The following paragraphs describe the operation of the SPI module. Refer to
of the SPI I/O registers.
Freescale Semiconductor
Full-duplex operation
Master and slave modes
Double-buffered operation with separate transmit and receive registers
Four master mode frequencies (maximum = bus frequency ÷ 2)
Maximum slave mode frequency = bus frequency
Serial clock with programmable polarity and phase
Two separately enabled interrupts:
Mode fault error flag with CPU interrupt capability
Overflow error flag with CPU interrupt capability
Programmable wired-OR mode
I/O (input/output) port bit(s) software configurable with pullup device(s) if configured as input port
bit(s)
SPRF (SPI receiver full)
SPTE (SPI transmitter empty)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Figure 15-3
for a summary
175

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