MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 197

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MCHC908GR8AVFAE

Manufacturer Part Number
MCHC908GR8AVFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8AVFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8AVFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
If the timebase functions are not required during stop mode, reduce power consumption by disabling the
timebase module before executing the STOP instruction.
16.6 Timebase Control Register
The timebase has one register, the timebase control register (TBCR), which is used to enable the
timebase interrupts and set the rate.
TBIF — Timebase Interrupt Flag
TBR2–TBR0 — Timebase Divider Selection Bits
TACK— Timebase Acknowledge Bit
Freescale Semiconductor
This read-only flag bit is set when the timebase counter has rolled over.
These read/write bits select the tap in the counter to be used for timebase interrupts as shown in
Table
The TACK bit is a write-only bit and always reads as 0. Writing a 1 to this bit clears TBIF, the timebase
interrupt flag bit. Writing a 0 to this bit has no effect.
1 = Timebase interrupt pending
0 = Timebase interrupt not pending
1 = Clear timebase interrupt flag
0 = No effect
16-1.
Address: $001C
Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
Reset:
Read:
Write:
Bit 7
TBIF
0
Figure 16-2. Timebase Control Register (TBCR)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
= Unimplemented
Table 16-1. Timebase Divider Selection
TBR2
6
0
TBR2
0
0
0
0
1
1
1
1
TBR1
5
0
TBR1
0
0
1
1
0
0
1
1
NOTE
TBR0
4
0
TBR0
0
1
0
1
0
1
0
1
TACK
3
R
0
0
Divider
32,768
= Reserved
8192
2048
128
64
32
16
8
TBIE
2
0
TBON
1
0
Timebase Control Register
Bit 0
R
0
197

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