CY8C3446LTI-073 Cypress Semiconductor Corp, CY8C3446LTI-073 Datasheet - Page 3

• Manufacturer Part Number: CY8C3446LTI-073
• Description: IC MCU 8BIT 64KB FLASH 48QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C34xxr

Specifications of CY8C3446LTI-073

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 50MHz
• Number Of I /o: 25
• Eeprom Size: 2K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 2x12b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Core Size: 8-Bit
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: QFN EP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C34
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 1.71 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 2KB
• Ram Memory Size: 8KB
• Cpu Speed: 50MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

1. Architectural Overview
Introducing the CY8C34 family of ultra low-power, flash Programmable System-on-Chip (PSoC
8-bit PSoC 3 and 32-bit PSoC 5 platform. The CY8C34 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Figure 1-1
family. They are:
Document Number: 001-53304 Rev. *K
8051 CPU subsystem
Nonvolatile subsystem
Programming, debug, and test subsystem
Inputs and outputs
Clocking
Power
Digital subsystem
Analog subsystem
0. 5 to 5.5V
( Optional )
32. 7 68 KHz
( Optional )
( Optional )
4- 25 MHz
illustrates the major components of the CY8C34
System Wide
Clocking System
Resources
Power Management
Xtal
Osc
IMO
1.8V LDO
POR and
System
Power
Timer
Sleep
Wake
SMP
WDT
LVD
RTC
ILO
and
Digital Interconnect
8- Bit
I2C Slave
Timer
EEPROM
UART
Figure 1-1. Simplified Block Diagram
LCD Direct
Temperature
EMIF
UDB
UDB
UDB
UDB
(TIA, PGA, Mixer etc )
CapSense
Universal Digital Block Array ( 24 x UDB)
Sensor
Drive
Quadrature Decoder
Memory System
2 x SC/ CT Blocks
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
2x DAC
12- Bit SPI
Logic
12- Bit PWM
UDB
UDB
UDB
UDB
16- Bit
PWM
System Bus
16- Bit PRS
8- Bit
Timer
PSoC’s digital subsystem provides half of its unique
configurability. It connects a digital signal from any peripheral to
any pin through the digital system interconnect (DSI). It also
provides functional flexibility through an array of small, fast, low-
power UDBs. PSoC Creator provides a library of prebuilt and
tested standard digital peripherals (UART, SPI, LIN, PRS, CRC,
timer, counter, PWM, AND, OR, and so on) that are mapped to
the UDB array. You can also easily create a digital circuit using
boolean primitives by means of graphical design entry. Each
UDB contains programmable array logic (PAL)/PLD functionality,
together with a small state machine engine to support a wide
variety of peripherals.
In addition to the flexibility of the UDB array, PSoC also provides
configurable digital blocks targeted at specific functions. For the
Digital System
UDB
UDB
UDB
UDB
Analog Interconnect
Logic
Cortex M3
8051 or
Analog System
CPU
UDB
UDB
UDB
UDB
ADC
CPU System
Del Sig
ADC
UDB
UDB
UDB
UDB
Controller
Interrupt
PHUB
DMA
PSoC
Counter
Timer
PWM
4 x
CAN
2.0
®
Opamp
) devices, part of a scalable
CMP
Program &
2 x
4 x
®
Boundary
Debug
Program
Debug &
+
+
FS USB
-
-
Master /
Trace
Scan
Slave
I2C
3: CY8C34 Family
2.0
Data Sheet
USB
PHY
Opamp
3 per
Page 3 of 126
22 Ω
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