MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 279

IC MPU 32BIT 66MHZ 196-MAPBGA

MCF5272CVF66

Manufacturer Part Number
MCF5272CVF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Not Compliant

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Bits
1
0
IN_DONE
STALL
Name
MCF5272 ColdFire
This bit controls the USB's response to IN tokens from the host. Set at Reset and on an EOT event
and must be cleared by software when the last byte of a transfer has been written to the IN-FIFO. This
bit is then subsequently set by the USB core when an end of transfer (EOT) event occurs, indicating
that the transfer has been completed. An end of transfer (EOT) event is indicated by one of the
following:
a) An IN packet is transmitted that contains less than the maximum number of bytes defined at
b) A zero length IN packet is transmitted. This occurs when the previously transmitted IN packet was
0 CPU has completed writing to the IN-FIFO and transfer is in progress. The USB module sends all
1 Transfer completed or CPU is busy writing to the IN-FIFO. The USB module only sends
Force STALL response. Causes the endpoint to return a STALL handshake when polled by either IN
or OUT token by the USB host controller. The STALL handshake causes the endpoint to be halted.
The STALL bit is not valid for isochronous endpoints. This command bit is write-only and always
returns 0 when read.
0 Default
1 Send STALL handshake
the data in the FIFO, or a zero-length packet when the FIFO is empty.
maximum-sized packets or NAK responses if the FIFO contains less data than the maximum
packet size.
endpoint configuration.
full, and no more data remains in the IN-FIFO. Hence a single zero length packet must be sent to
indicate EOT.
Table 12-13. EP
®
Integrated Microprocessor User’s Manual, Rev. 3
n
CTL Field Descriptions
Description
Universal Serial Bus (USB)
12-21

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