MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 292

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

Universal Serial Bus (USB)
packet size and the EPDPn registers are updated in real-time, not just at the end of a packet as with other
endpoint types. If the packet size is larger than the FIFO size, the FIFO level interrupt must be used.
Isochronous packets are guaranteed to occur once per USB frame. The SOF and ASOF interrupts are
provided in order for the user to synchronize the data flow with the USB. The SOF interrupt occurs every
1 ms provided the USB is active. The ASOF interrupt is generated if the USB module fails to detect a SOF
packet within the set timeout period.
It is strongly recommended that interrupts be used rather than polling for isochronous endpoints as
isochronous endpoints do not have any error detection or flow-control mechanisms. If the packet size is
larger than the FIFO size, using interrupts is required.
12.4.4.2.1
The user should write one packet of data to the IN FIFO per frame. If an ASOF interrupt occurs, the user
may wish to insert additional data in the data stream if the data for the frame is lost. The following example
demonstrates how to handle an isochronous IN packet each frame with a packet size larger than the FIFO
size:
12.4.4.2.2
The user should read one packet of data from the OUT FIFO per frame. If an ASOF interrupt occurs, the
user may wish to discard the data for the frame. The following example demonstrates how to handle an
isochronous OUT packet each frame with a packet size larger than the FIFO size:
12.4.5
The class- and vendor-specific requests are specific to a particular device class or vendor, and are not
processed by the USB request processor. When the USB module receives a class or vendor request, the
parameters for the request are written to the DRR1 and DRR2 registers and the user is notified of the
12-34
1. Wait for the SOF interrupt for synchronization.
2. Write data to the FIFO until filled.
3. Wait for FIFO_LVL interrupt.
4. Read EPnDP to determine the number of bytes that can be written to the FIFO.
5. Write data to the FIFO to fill it or until all of the data for the packet has been written.
6. Repeat steps 3–5 until the entire packet has been written to the FIFO.
1. Wait for SOF interrupt for synchronization. The user may want to track that a packet is received
2. Wait for the FIFO_LVL interrupt.
3. Read EPDPn to determine number of bytes in the FIFO.
4. Read data the indicated number of bytes from the FIFO.
5. Repeat steps 2–4 until entire packet is received.
6. Wait for EOP or SOF interrupt and read any remaining data in the FIFO.
7. An EOT interrupt indicates a short or zero-length packet.
for every frame.
Class- and Vendor-Specific Request Operation
IN Endpoints
OUT Endpoints
MCF5272 ColdFire
®
Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor