AD9857AST Analog Devices Inc, AD9857AST Datasheet - Page 21

• Manufacturer Part Number: AD9857AST
• Description: IC QUADRATURE DGTL UPCONV 80LQFP
• Manufacturer: Analog Devices Inc
• Series: AD9857r

Specifications of AD9857AST

• Rohs Status: RoHS non-compliant
• Function: Upconverter
• Frequency: 5MHz ~ 200MHz
• Rf Type: HFC Cable Network
• Package / Case: 80-LQFP

PROGRAMMABLE (2× TO 63×) CIC
INTERPOLATING FILTER
The programmable interpolator is implemented as a CIC filter.
It is programmable by a 6-bit control word, giving a range of
2× to 63× interpolation. This interpolator has a low-pass
frequency characteristic that is compensated by the inverse CIC
filter.
The programmable interpolator can be bypassed to yield a 1×
appropriate control register, per each profile. Whenever the
programmable interpolator is bypassed (1× CIC rate), power to
the stage is removed. If the programmable interpolator is
bypassed, the inverse CIC filter (see above) is automatically
bypassed, because its compensation is not needed in this case.
The output of the programmable interpolator is the data from
the 4× interpolator upsampled by an additional 2× to 63×,
according to the rate chosen by the user. This results in the
input data being upsampled by a factor of 8× to 252×.
(no interpolation) configuration by setting the bit in the
A)
B)
C)
BANDWIDTH
OF I OR Q
DATA
f
f
f
NYQ
NYQ
NYQ
(@1 )
(@1 )
(@1 )
Figure 26. Effect of Alpha
1 SAMPLE RATE
f
f
= 0
= 0.5
NYQ
NYQ
= 1
f
(@2 )
IQ
(@2 )
HALF-BAND FILTER RESPONSE
f
AT INPUT TO AD9857
2× OVERSAMPLE RATE
2 OVERSAMPLE RATE
IQ
: DATA VECTOR RATE
f
f
IQ
IQ
f
f
f
Rev. C| Page 21 of 40
The transfer function of the CIC interpolating filter is
where R is the interpolation rate, and f is the frequency relative
to SYSCLK.
QUADRATURE MODULATOR
The digital quadrature modulator stage is used to frequency
shift the baseband spectrum of the incoming data stream up to
the desired carrier frequency (this process is known as
upconversion).
At this point the incoming data has been converted from an
incoming sampling rate of f
SYSCLK. The purpose of the upsampling process is to make the
data sampling rate equal to the sampling rate of the carrier
signal.
The carrier frequency is controlled numerically by a Direct
Digital Synthesizer (DDS). The DDS uses the internal reference
clock (SYSCLK) to generate the desired carrier frequency with a
high degree of precision. The carrier is applied to the I and Q
multipliers in quadrature fashion (90° phase offset) and
summed to yield a data stream that represents the quadrature
modulated carrier.
The modulation is done digitally which eliminates the phase
and gain imbalance and crosstalk issues typically associated
with analog modulators. Note that the modulated “signal” is
actually a number stream sampled at the rate of SYSCLK, the
same rate at which the output D/A converter is clocked.
The quadrature modulator operation is also controlled by
spectral invert bits in each of the four profiles. The quadrature
modulation takes the form:
when the spectral invert bit is set to a Logic 1.
when the spectral invert bit is set to a Logic 0.
DDS CORE
The direct digital synthesizer (DDS) block generates the sin/cos
carrier reference signals that digitally modulate the I/Q data
paths. The DDS frequency is tuned via the serial control port
with a 32-bit tuning word (per profile). This allows the
AD9857’s output carrier frequency to be very precisely tuned
while still providing output frequency agility.
H
I
I
×
×
(
cos
cos
f
)
=
( )
( )
ω
ω
⎛
⎜
⎝
k
R
∑
+
−
=
−
0
1
Q
Q
e
−
×
×
j
sin
2 (
sin
π
fk
( )
( )
)
ω
ω
⎞
⎟
⎠
5
IN
to an I/Q sampling rate equal to
AD9857
(1)