AD9857AST Analog Devices Inc, AD9857AST Datasheet - Page 28

IC QUADRATURE DGTL UPCONV 80LQFP

AD9857AST

Manufacturer Part Number
AD9857AST
Description
IC QUADRATURE DGTL UPCONV 80LQFP
Manufacturer
Analog Devices Inc
Series
AD9857r
Datasheet

Specifications of AD9857AST

Rohs Status
RoHS non-compliant
Function
Upconverter
Frequency
5MHz ~ 200MHz
Rf Type
HFC Cable Network
Package / Case
80-LQFP

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AD9857
PROFILE #1
Tuning Word—Register Address 08h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The lower byte of the 32-bit frequency tuning word, Bits 0–7.
Tuning Word—Register Address 09h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The second byte of the 32-bit frequency tuning word, Bits 8–15.
Tuning Word—Register Address 0Ah, Bits 0, 1, 2, 3, 4, 5, 6, 7
The third byte of the 32-bit frequency tuning word, Bits 16–23.
Tuning Word—Register Address 0Bh, Bits 0, 1, 2, 3, 4, 5, 6, 7
The fourth byte of the 32-bit frequency tuning word, Bits 24–31.
Inverse CIC Bypass—Register Address 0Ch, Bit 0
When set to a Logic 1, the inverse CIC filter is BYPASSED.
When set to a Logic 0, the inverse CIC filter is active.
Spectral Invert—Register Address 0Ch, Bit 1
The quadrature modulator takes the form:
I × cos(ω) + Q × sin(ω) when set to a Logic 1.
I × cos(ω) − Q × sin(ω) when set to a Logic 0.
CIC Interpolation Rate—Register Address 0Ch, Bits 2, 3, 4, 5,
6, 7
00h: Invalid entry.
01h: CIC filters BYPASSED.
02h–3Fh: CIC interpolation rate (2–63, decimal).
Output Scale Factor—Register Address 0Dh, Bits 0, 1, 2, 3, 4,
5, 6, 7
An 8-bit number that serves as a multiplier for the data pathway
before the data is delivered the DAC. It has an LSB weight of 2
(0.0078125). This yields a multiplier range of 0 to 1.9921875.
PROFILE #2
Tuning Word—Register Address 0Eh, Bits 0, 1, 2, 3, 4, 5, 6, 7
The lower byte of the 32-bit frequency tuning word, Bits 0–7.
Tuning Word—Register Address 0Fh, Bits 0, 1, 2, 3, 4, 5, 6, 7
The second byte of the 32-bit frequency tuning word, Bits 8–15.
Tuning Word—Register Address 10h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The third byte of the 32-bit frequency tuning word, Bits 16–23.
Tuning Word—Register Address 11h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The fourth byte of the 32-bit frequency tuning word, Bits 24–31.
Inverse CIC Bypass—Register Address 12h, Bit 0
When set to a Logic 1, the inverse CIC filter is BYPASSED.
When set to a Logic 0, the inverse CIC filter is active.
Rev. C | Page 28 of 40
–7
Spectral Invert—Register Address 12h, Bit 1
The quadrature modulator takes the form:
I × cos( ω ) + Q × sin( ω ) when set to a Logic 1.
I × cos( ω ) − Q × sin( ω ) when set to a Logic 0.
CIC Interpolation Rate—Register Address 12h, Bits 2, 3, 4, 5,
6, 7
00h: Invalid entry.
01h: CIC filters BYPASSED.
02h–3Fh: CIC interpolation rate (2–63, decimal).
Output Scale Factor—Register Address 13h, Bits 0, 1, 2, 3, 4,
5, 6, 7
An 8-bit number that serves as a multiplier for the data pathway
before the data is delivered the DAC. It has an LSB weight of 2
(0.0078125). This yields a multiplier range of 0 to 1.9921875.
PROFILE #3
Tuning Word—Register Address 14h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The lower byte of the 32-bit frequency tuning word, Bits 0–7.
Tuning Word—Register Address 15h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The second byte of the 32-bit frequency tuning word, Bits 8–15.
Tuning Word—Register Address 16h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The third byte of the 32-bit frequency tuning word, Bits 16–23.
Tuning Word—Register Address 17h, Bits 0, 1, 2, 3, 4, 5, 6, 7
The fourth byte of the 32-bit frequency tuning word, Bits 24–31.
Inverse CIC Bypass—Register Address 18h, Bit 0
When set to a Logic 1, the inverse CIC filter is BYPASSED.
When set to a Logic 0, the inverse CIC filter is active.
Spectral Invert—Register Address 18h, Bit 1
The quadrature modulator takes the form:
I × cos(ω) + Q × sin(ω) when set to a Logic 1.
I × cos(ω) − Q × sin(ω) when set to a Logic 0.
CIC Interpolation Rate—Register Address 18h, Bits 2, 3, 4, 5,
6, 7
00h: Invalid entry.
01h: CIC filters BYPASSED.
02h–3Fh: CIC interpolation rate (2–63, decimal).
Output Scale Factor—Register Address 19h, Bits 0, 1, 2, 3, 4,
5, 6, 7
An 8-bit number that serves as a multiplier for the data pathway
before the data is delivered the DAC. It has an LSB weight of 2
(0.0078125). This yields a multiplier range of 0 to 1.9921875.
–7
–7

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