MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 12

IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN

MRF24J40-I/ML

Manufacturer Part Number
MRF24J40-I/ML
Description
IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
Manufacturer
Microchip Technology
Datasheets

Specifications of MRF24J40-I/ML

Package / Case
40-QFN
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4
Applications
ISM, ZigBee™
Power - Output
0dBm
Sensitivity
-95dBm
Voltage - Supply
2.4 V ~ 3.6 V
Current - Receiving
18mA
Current - Transmitting
18mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2.4 GHz
Interface Type
4 Wire SPI
Noise Figure
8 dB
Output Power
+ 0 dBm
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
Maximum Supply Current
22 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF24J40-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MRF24J40-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.13
The MRF24J40 communicates with a host micro-
controller via a 4-wire SPI port as a slave device. The
MRF24J40 supports SPI (mode 0,0) which requires
that SCK idles in a low state. The CS pin must be held
low while communicating with the MRF24J40.
Figure 2-4 shows timing for a write operation. Data is
received by the MRF24J40 via the SDI pin and is
clocked in on the rising edge of SCK. Figure 2-5 shows
timing for a read operation. Data is sent by the
MRF24J40 via the SDO pin and is clocked out on the
falling edge of SCK.
FIGURE 2-4:
FIGURE 2-5:
DS39776C-page 12
MRF24J40
SDO
SCK
SDO
SDI
SCK
CS
SDI
Serial Peripheral Interface (SPI)
Port Pins
CS
SPI PORT WRITE (INPUT) TIMING
SPI PORT READ (OUTPUT) TIMING
MSb
MSb
Preliminary
Note:
The SDO pin 17 defaults to a low state
when CS is high (the MRF24J40 is not
selected). If the MRF24J40 is to share a
SPI bus, a tri-state buffer should be placed
on
high-impedance signal to the SPI bus. See
Section 4.4 “MRF24J40 Schematic and
Bill of Materials” for an example
application circuit.
LSb
the
SDO
© 2010 Microchip Technology Inc.
signal
LSb
to
provide
a

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