MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 16

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.15
Control registers provide control, status and device
addressing for MRF24J40 operations. The following
figures, tables and register definitions describe the
control register operation.
2.15.1
FIGURE 2-11:
FIGURE 2-12:
DS39776C-page 16
MRF24J40
0x20C
0x20D
0x20A
0x20B
0x20E
0x200
0x201
0x202
0x203
0x204
0x205
0x206
0x207
0x208
0x209
0x20F
Control Register Description
RFSTATE
Reserved
SLPCAL0
SLPCAL1
SLPCAL2
Reserved
Reserved
Reserved
RFCON0
RFCON1
RFCON2
RFCON3
RFCON5
RFCON6
RFCON7
RFCON8
CONTROL REGISTER MAP
0x0C
0x0D
0x0A
0x0B
0x0E
0x0F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
RXFLUSH
Reserved
Reserved
RXMCR
PANIDH
PANIDL
SADRH
SADRL
EADR0
EADR1
EADR2
EADR3
EADR4
EADR5
EADR6
EADR7
SHORT ADDRESS CONTROL REGISTER MAP FOR MRF24J40
LONG ADDRESS CONTROL REGISTER MAP FOR MRF24J40
0x21C
0x21D
0x21A
0x21B
0x21E
0x210
0x212
0x213
0x214
0x215
0x216
0x217
0x218
0x219
0x21F
0x211
SLPCON0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RSSI
0x1A
0x1B
0x1C
0x1D
0x1E
0x10
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1F
0x11
ACKTMOUT
SYMTICKH
ESLOTG23
ESLOTG45
SYMTICKL
TXG1CON
TXG2CON
TXBCON0
ESLOTG1
Reserved
TXNCON
PACON0
PACON1
PACON2
ORDER
TXMCR
0x22C
0x22D
0x22A
0x22B
0x22E
0x220
0x221
0x222
0x223
0x224
0x225
0x226
0x227
0x228
0x229
0x22F
Preliminary
WAKETIMEH
WAKETIMEL
TESTMODE
REMCNTH
MAINCNT0
MAINCNT1
MAINCNT2
MAINCNT3
REMCNTL
SLPCON1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x2C
0x2D
0x2A
0x2B
0x2E
0x2F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
FRMOFFSET
HSYMTMRH
HSYMTMRL
ESLOTG67
WAKECON
TXBCON1
SECCON0
SECCON1
GATECLK
SOFTRST
Reserved
Reserved
TXPEND
TXSTAT
TXTIME
TXSTBL
0x23C
0x23D
0x23A
0x23B
0x23E
0x23F
ox230
0x231
0x232
0x233
0x234
0x235
0x236
0x237
0x238
0x239
Unimplemented
Unimplemented
Unimplemented
Unimplemented
ASSOSADR0
ASSOSADR1
ASSOEADR0
ASSOEADR1
ASSOEADR2
ASSOEADR3
ASSOEADR4
ASSOEADR5
ASSOEADR6
ASSOEADR7
Reserved
Reserved
0x3C
0x3D
0x3A
0x3B
0x3E
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3F
© 2010 Microchip Technology Inc.
CCAEDTH
TRISGPIO
Reserved
INTSTAT
SECCR2
BBREG0
BBREG1
BBREG2
BBREG3
BBREG4
BBREG6
INTCON
SLPACK
RFCTL
RXSR
GPIO
0x240
0x241
0x242
0x243
0x24A
0x24B
0x24C
0x244
0x245
0x246
0x247
0x248
0x249
UPNONCE10
UPNONCE12
UPNONCE11
UPNONCE0
UPNONCE1
UPNONCE2
UPNONCE3
UPNONCE4
UPNONCE5
UPNONCE6
UPNONCE7
UPNONCE8
UPNONCE9