MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 40

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 2-31:
DS39776C-page 40
MRF24J40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 0
Note 1:
bit 1
MLIFS5
R/W-1
Refer to IEEE 802.15.4™-2003 Standard, Section 7.2.1.1.3 “Frame Pending Subfield” and
Section 7.2.2.3.1 “Acknowledgement Frame MHR Fields”.
MLIFS<5:0>: Minimum Long Interframe Spacing bits
The minimum number of symbols forming a Long Interframe Spacing (LIFS) period. Refer to
IEEE 802.15.4™-2003 Standard, Section 7.5.1.2 “IFS” and Table 70: MAC Sublayer Constants.
MLIFS + RFSTBL = aMinLIFSPeriod = 40 symbols.
Units: symbol period (16 μs). Default value: 0x21. Recommended values: MLIFS = 0x1F and
RFSTBL = 0x9.
GTSSWITCH: Continue TX GTS FIFO Switch in CFP bit
1 = GTS1 and GTS2 FIFO will toggle with each other during CFP
0 = GTS1 and GTS2 FIFO will stop toggling with each other if the transmission fails (default)
FPACK: Frame Pending bit in the Acknowledgement Frame bit
Sets or clears the frame pending bit in the Acknowledgement frame.
1 = Sets frame pending bit
0 = Clears frame pending bit
MLIFS4
R/W-0
TXPEND: TX DATA PENDING REGISTER (ADDRESS: 0x21)
W = Writable bit
‘1’ = Bit is set
MLIFS3
R/W-0
MLIFS2
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MLIFS1
R/W-0
MLIFS0
R/W-1
(1)
x = Bit is unknown
© 2010 Microchip Technology Inc.
GTSSWITCH
R/W-0
FPACK
R/W-0
bit 0
(1)