ATMEGA165P-16ANR Atmel, ATMEGA165P-16ANR Datasheet - Page 117
ATMEGA165P-16ANR
Manufacturer Part Number
ATMEGA165P-16ANR
Description
IC MCU AVR 16K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165P-16ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.10 Timer/Counter Timing Diagrams
8019K–AVR–11/10
The extreme values for the OCR1x Register represents special cases when generating a PWM
waveform output in the phase and frequency correct PWM mode. If the OCR1x is set equal to
BOTTOM the output will be continuously low and if set equal to TOP the output will be set to
high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic val-
ues. If OCR1A is used to define the TOP value (WGM1[3:0] = 9) and COM1A[1:0] = 1, the OC1A
output will toggle with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set, and when the OCR1x Register is updated with the OCR1x buffer value (only for
modes utilizing double buffering).
Figure 14-10
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF1x, no Prescaling
Figure 14-11
Figure 14-11. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
TCNTn
OCRnx
OCFnx
TCNTn
OCRnx
(clk
OCFnx
(clk
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
shows a timing diagram for the setting of OCF1x.
shows the same timing data, but with the prescaler enabled.
OCRnx - 1
OCRnx - 1
OCRnx
OCRnx
OCRnx Value
OCRnx Value
OCRnx + 1
OCRnx + 1
T1
ATmega165P
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
117
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