ATMEGA165P-16ANR Atmel, ATMEGA165P-16ANR Datasheet - Page 32
ATMEGA165P-16ANR
Manufacturer Part Number
ATMEGA165P-16ANR
Description
IC MCU AVR 16K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165P-16ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7.7
8019K–AVR–11/10
External Clock
To drive the device from an external clock source, XTAL1 should be driven as shown in
7-4. To run the device on an external clock, the CKSEL Fuses must be programmed to “0000”.
Figure 7-4.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 7-11.
Table 7-12.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the
MCU is kept in Reset during such changes in the clock frequency.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
33
CKSEL3..0
0000
SUT1..0
for details.
00
01
10
11
7-12.
Start-up Time from Power-
External Clock Drive Configuration
Crystal Oscillator Clock Frequency
Start-up Times for the External Clock Selection
down and Power-save
6 CK
6 CK
6 CK
EXTERNAL
SIGNAL
CLOCK
NC
Frequency Range
0 - 16 MHz
Additional Delay from
Reset (V
Reserved
14CK + 4.1 ms
14CK + 65 ms
14CK
XTAL2
XTAL1
GND
CC
= 5.0V)
“System Clock Prescaler” on page
ATmega165P
BOD enabled
Fast rising power
Slowly rising power
Recommended Usage
Figure
32
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