ATMEGA165P-16ANR Atmel, ATMEGA165P-16ANR Datasheet - Page 346
![IC MCU AVR 16K 16MHZ 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA165P-16ANR
Manufacturer Part Number
ATMEGA165P-16ANR
Description
IC MCU AVR 16K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165P-16ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Note:
8019K–AVR–11/10
0x0D (0x2D)
0x0C (0x2C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega165P is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN
and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
Reserved
Reserved
Reserved
Reserved
Name
PORTG
PORTE
PORTD
PORTC
PORTF
PORTB
PORTA
DDRG
DDRD
DDRC
TIFR2
TIFR1
TIFR0
DDRF
DDRE
DDRB
DDRA
PING
PINF
PINE
PIND
PINC
PINB
PINA
PORTD7
PORTC7
PORTF7
PORTE7
PORTB7
PORTA7
Bit 7
PINE7
PIND7
PINC7
PINB7
PINA7
PINF7
DDE7
DDD7
DDC7
DDB7
DDA7
DDF7
–
–
–
–
–
–
–
–
–
–
PORTD6
PORTC6
PORTF6
PORTE6
PORTB6
PORTA6
Bit 6
PINF6
PINE6
PIND6
PINC6
PINB6
PINA6
DDE6
DDD6
DDC6
DDB6
DDA6
DDF6
–
–
–
–
–
–
–
–
–
–
PORTG5
PORTE5
PORTD5
PORTC5
PORTB5
PORTA5
PORTF5
Bit 5
PING5
PINF5
PINE5
PIND5
PINC5
PINB5
PINA5
DDG5
DDE5
DDD5
DDC5
DDB5
DDA5
DDF5
ICF1
–
–
–
–
–
–
PORTG4
PORTF4
PORTE4
PORTD4
PORTC4
PORTB4
PORTA4
PING4
Bit 4
PINF4
PINE4
PIND4
PINC4
PINB4
PINA4
DDG4
DDF4
DDE4
DDD4
DDC4
DDB4
DDA4
–
–
–
–
–
–
–
PORTG3
PORTF3
PORTE3
PORTD3
PORTC3
PORTB3
PORTA3
PING3
Bit 3
DDG3
PINF3
PINE3
PIND3
PINC3
PINB3
PINA3
DDF3
DDE3
DDD3
DDC3
DDB3
DDA3
–
–
–
–
–
–
–
PORTG2
PORTF2
PORTE2
PORTD2
PORTC2
PORTB2
PORTA2
OCF1B
PING2
PIND2
PINC2
Bit 2
DDG2
PINF2
PINE2
PINB2
PINA2
DDF2
DDE2
DDD2
DDC2
DDB2
DDA2
–
–
–
–
–
–
PORTG1
PORTE1
PORTD1
PORTC1
PORTB1
PORTA1
PORTF1
OCF2A
OCF1A
OCF0A
PING1
Bit 1
PINF1
PINE1
PIND1
PINC1
PINB1
PINA1
DDG1
DDF1
DDE1
DDD1
DDC1
DDB1
DDA1
–
–
–
–
ATmega165P
PORTG0
PORTD0
PORTC0
PORTF0
PORTE0
PORTB0
PORTA0
Bit 0
PING0
PINE0
PIND0
PINC0
PINB0
PINA0
DDG0
PINF0
DDE0
DDD0
DDC0
DDB0
DDA0
TOV2
TOV1
TOV0
DDF0
–
–
–
–
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