S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 349

IC MCU 16BIT 128KB FLSH 112LQFP

S9S12XS128J1MAL

Manufacturer Part Number
S9S12XS128J1MAL
Description
IC MCU 16BIT 128KB FLSH 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS128J1MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12XS128J1MAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 12
Periodic Interrupt Timer (S12PIT24B4CV1)
12.1
The period interrupt timer (PIT) is an array of 24-bit timers that can be used to trigger peripheral modules
or raise periodic interrupts. Refer to
12.1.1
12.1.2
The PIT includes these features:
12.1.3
Refer to the SoC guide for a detailed explanation of the chip modes.
Freescale Semiconductor
micro time bases
Four timers implemented as modulus down-counters with independent time-out periods.
Time-out periods selectable between 1 and 2
cycles with 1 <= m <= 256 and 1 <= n <= 65536.
Timers that can be enabled individually.
Four time-out interrupts.
Four time-out trigger output signals available to trigger peripheral modules.
Start of timer channels can be aligned to each other.
Introduction
Number
Version
01.00
01.01
Glossary
Features
Modes of Operation
CCR
SoC
ISR
PIT
28-Apr-05 28-Apr-05
Revision
05-Jul-05
Date
Effective
05-Jul-05
Periodic Interrupt Timer
Interrupt Service Routine
Condition Code Register
System on Chip
clock periods of the 16-bit timer modulus down-counters, which are generated by the 8-bit
modulus down-counters.
Date
S12XS Family Reference Manual, Rev. 1.11
Figure 12-1
Table 12-1. Revision History
Acronyms and Abbreviations
Author
for a simplified block diagram.
24
bus clock cycles. Time-out equals m*n bus clock
Initial Release
Added application section, removed table 1-1
Description of Changes
349

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