AFS600-PQG208 Actel, AFS600-PQG208 Datasheet - Page 143

• Manufacturer Part Number: AFS600-PQG208
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AFS600-PQG208

• Processor Series: AFS600
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 95
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 600 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Calculating Accuracy for a Calibrated Analog Channel
For a given prescaler range,
where
Calculating LSBs from a Given Error Budget
For a given prescaler range,
Min. Output Voltage = (Min. Negative output offset) + (Input Voltage x Min. Gain)
= (–136 mV) + (5 V x 0.98) = 4.764 V
Formula
Channel TUE in V = Channel TUE in LSBs x Equivalent voltage per LSB
Example
Input Voltage = 5 V
Chosen Prescaler range = 8 V range
Refer to
Max. Output Voltage = Max. Channel TUE in V + Input Voltage
Max. Channel TUE in V = (6 LSB) × (8 mV per LSB in 10-bit mode) = 48 mV
Max. Output Voltage = 48 mV + 5 V = 5.048 V
Similarly,
Min Output Voltage = Min Channel TUE in V + Input Voltage = (-48 mV) + 5 V = 4.952 V
Formula
LSB count = ± (Input Voltage × Required % error) / (Equivalent voltage per LSB)
Example
Input Voltage = 5 V
Required error margin= 1%
Refer to
Equivalent voltage per LSB = 16 mV for a 16V prescaler, with ADC in 10-bit mode
LSB Count = ± (5.0 V × 1%) / (0.016)
LSB Count = ± 3.125
Equivalent voltage per LSB = 8 mV for an 8 V prescaler, with ADC in 10-bit mode
LSB Count = ± (5.0 V × 1%) / (0.008)
LSB Count = ± 6.25
The 8 V prescaler satisfies the calculated LSB count accuracy requirement (see
page
2-125).
Table 2-49 on page
Table 2-49 on page
Output Voltage = Channel TUE in V + Input Voltage
EQ 25
2-125.
2-125.
gives the output voltage.
R e v i s i o n 1
Actel Fusion Family of Mixed Signal FPGAs
Table 2-49 on
EQ 25
2- 127