AFS600-PQG208 Actel, AFS600-PQG208 Datasheet - Page 66

• Manufacturer Part Number: AFS600-PQG208
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AFS600-PQG208

• Processor Series: AFS600
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 95
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 600 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Architecture
Figure 2-38 • Read Waveform (Non-Pipe Mode, 32-bit access)
Figure 2-39 • Read Waveform (Pipe Mode, 32-bit access)
2- 50
DATAWIDTH[1:0]
DATAWIDTH[1:0]
STATUS[1:0]
STATUS[1:0]
ADDR[17:0]
ADDR[17:0]
RD[31:0]
RD[31:0]
BUSY
BUSY
REN
CLK
REN
CLK
Read Operation
Read operations are designed to read data from the FB Array, Page Buffer, Block Buffer, or status
registers. Read operations support a normal read and a read-ahead mode (done by asserting
READNEXT). Also, the timing for Read operations is dependent on the setting of PIPE.
The following diagrams illustrate representative timing for Non-Pipe Mode
(Figure
2-39) reads of the flash memory block interface.
A0
A0
0
0
0
0
A1
A1
D0
S0
R e visio n 1
D1
S1
S0
D0
A2
S2
D2
S1
D1
A2
A3
S3
D3
S2
D2
A3
S3
D3
0
0
(Figure
0
0
A4
A4
2-38) and Pipe Mode
D4
X
S4
D4
S4
0
0