AFS600-PQG208 Actel, AFS600-PQG208 Datasheet - Page 217

• Manufacturer Part Number: AFS600-PQG208
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AFS600-PQG208

• Processor Series: AFS600
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 95
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 600 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-135 • Minimum and Maximum DC Input and Output Levels
Figure 2-122 • AC Loading
Table 2-136 • AC Waveforms, Measuring Points, and Capacitive Loads
Table 2-137 • 3.3 V GTL
3.3 V GTL
Drive
Strength
25 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Input Low (V)
VREF – 0.05
Note:
Speed
Grade
Note:
Std.
–1
–2
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < V
3
is the input leakage current per I/O pin over recommended operating conditions V
*Measuring point = V
For the derating values at specific junction temperature and voltage supply levels, refer to
page
Commercial Temperature Range Conditions: T
Worst-Case VCCI = 3.0 V, VREF = 0.8 V
t
Voltage Referenced I/O Characteristics
3.3 V GTL
Gunning Transceiver Logic is a high-speed bus standard (JESD8-3). It provides a differential amplifier
input buffer and an open-drain output buffer. The V
DOUT
0.66
0.56
0.49
3-9.
Min.
–0.3
V
Timing Characteristics
Input High (V)
VREF – 0.05 VREF + 0.05
VREF + 0.05
VIL
2.08
1.77
1.55
t
DP
Max.
V
trip
. See
0.04
0.04
0.03
t
DIN
Table 2-87 on page 2-168
Min.
Measuring Point* (V)
V
2.93
2.50
2.19
t
PY
Test Point
VIH
t
0.8
0.43
0.36
0.32
EOUT
Max.
3.6
V
GTL
R e v i s i o n 1
2.04
1.73
1.52
t
VTT
ZL
J
Max.
VOL
for a complete table of trip points.
0.4
CCI
= 70°C, Worst-Case VCC = 1.425 V,
V
25
10 pF
VREF (typ.) (V)
pin should be connected to 3.3 V.
2.08
1.77
1.55
t
ZH
VOH
Min.
0.8
V
–
Actel Fusion Family of Mixed Signal FPGAs
t
LZ
mA mA
I
25
OL
I
25
OH
IH
V
t
HZ
TT
< V
Max.
(typ.) (V)
mA
I
181
1.2
OSL
IN
4.27
3.63
3.19
t
3
< V
ZLS
IN
CCI
Max.
I
mA
268
OSH
< V
. Input current is
t
4.31
3.67
3.22
3
ZHS
Table 3-7 on
IL
C
.
LOAD
µA
I
10
IL
10
1
4
Units
(pF)
ns
ns
ns
µA
2- 201
I
10
IH
2
4