LFXP2-8E-5FTN256C Lattice, LFXP2-8E-5FTN256C Datasheet - Page 140

• Manufacturer Part Number: LFXP2-8E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 8K LUTs 201I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-8E-5FTN256C

• Number Of Macrocells: 8000
• Number Of Programmable I/os: 201
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Reset Behavior
Figure 9-15 illustrates the asynchronous RST behavior.
Figure 9-15. CLKDIV Reset Behavior
Release Behavior
The port, “Release” is used to synchronize the all outputs after RST is de-asserted. Figure 9-16 Illustrates the
release behavior.
Figure 9-16. CLKDIV Release Behavior
CLKI
RST
CDIV1
RELEASE
CDIV2
CDIV4
CDIV8
CLKI
RST
CDIV1
CDIV2
CDIV4
CDIV8
De-asserted RST
registered
RST asserted
asynchronously.
All clock outputs are
forced low.
Clock start counting
De-asserted RST is
registered.
9-18
After de-asserted RST is
registered all outputs start
toggling.
Release synchronizes
outputs
LatticeXP2 sysCLOCK PLL
Design and Usage Guide