LFXP2-8E-5FTN256C Lattice, LFXP2-8E-5FTN256C Datasheet - Page 153

FPGA - Field Programmable Gate Array 8K LUTs 201I/O Inst- on DSP 1.2V -5 Spd

LFXP2-8E-5FTN256C

Manufacturer Part Number
LFXP2-8E-5FTN256C
Description
FPGA - Field Programmable Gate Array 8K LUTs 201I/O Inst- on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-8E-5FTN256C

Number Of Macrocells
8000
Number Of Programmable I/os
201
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Lattice Semiconductor
LatticeXP2 Memory Usage Guide
IPexpress Flow
For generating any of these memories, create (or open) a project for the LatticeXP2 devices.
From the Project Navigator, select Tools > IPexpress or click on the button in the toolbar when LatticeXP2 devices
are targeted in the project. This opens the IPexpress main window as shown in Figure 10-2.
Figure 10-2. IPExpress - Main Window
The left pane of this window includes the Module Tree. The EBR-based Memory Modules are under the
EBR_Components and the PFU-based Distributed Memory Modules are under Storage_Components, as shown
in Figure 10-2.
As an example, let us consider generating an EBR-based Pseudo Dual Port RAM of size 512x16. Select RAM_DP
under EBR_Components. The right pane changes as shown in Figure 10-3.
10-3

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