ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 211

• Manufacturer Part Number: ML610Q428-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q428-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.2.6
• I20EN (bit 0)
• I20MD (bit 1)
• I20DW1, I20DW0 (bits 3, 2)
• I20SYN (bit 4)
Address: 0F2A4H
Access: R/W
Access size: 8 bits
Initial value: 00H
I2C0MOD is a special function register (SFR) to set operating mode.
[Description of Bits]
Note:
The I
when using PLL oscillation (approx. 8.192 MHz) for high-speed oscillation, select 1/2HSCLK at selection of the
HSCLK frequency of FCON0 and select 10% communication speed reduction at selection of I2C0MOD
communication speed reduction. When 500 kHz RC oscillation is used, communication in standard mode (50kbps) is
available with the fast mode by setting I20MD bit to “1”.
Initial value
I2C0MOD
The I20EN bit is used to enable the operation of the I
I20ST bit can be set and the I20BB flag starts operation. When the I20EN bit is set to “0”, all the SFRs related to the
I
The I20MD bit is used to set the communication speed of the I
selected.
The I20DW1 and I20DW0 bits are used to set the communication speed reduction rate of the I
this bit so that the communication speed does not exceed 100kpbs/400kpbs.
The I20SYN bit is used to select whether or not to use the clock synchronization function (handshake function).
When using the clock synchronization function or using a multi-master, set this bit to “1”.
2
C bus 0 are initialized.
R/W
2
C bus is set so that the communication speed may become 100kbps/400kbps when HSCLK is 4 MHz. Therefore,
I20DW1
I20SYN
I20MD
I20EN
0
1
0
1
I
0
0
1
1
0
1
2
C Bus 0 Mode Register (I2C0MOD)
R/W
Standard mode (initial value)/ 100kbps@1MHz HSCLK
Fast mode / Max. 400kbps@4MHz HSCLK
Stops I
Enables I
—
Clock synchronization is not used. (Initial value)
Clock synchronization is used.
7
0
I20DW0
0
1
0
1
2
C operation. (Initial value)
2
C operation.
R/W
—
6
0
No communication speed reduction (initial value)
10% communication speed reduction
20% communication speed reduction
30% communication speed reduction
R/W
—
5
0
I20SYN
Description
14 – 7
Description
Description
R/W
4
0
2
C bus interface. Only when the I20EN bit is set to “1”, the
Description
2
I20DW1
C bus interface. Standard mode or fast mode can be
R/W
0
3
ML610Q428/ML610Q429 User’s Manual
I20DW0
R/W
2
0
Chapter 14 I
I20MD
R/W
1
0
2
C bus interface. Set
2
C Bus Interface
I20EN
R/W
0
0