ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 92
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
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6.3
6.3.1
6.3.1.1
Figure 6-2 shows the configuration of the low-speed clock generation circuit.
A low-speed clock generation circuit is provided with an external 32.768 kHz crystal. To match the oscillation
frequency by using a trimmer capacitor, connect external capacitors (C
In STOP mode, V
Impedance state).
When the ENMLT bit of FCON1 is set to “1”, the 2× low-speed clock circuit starts to generate the LSCLK×2(64kHz)
Notes:
− Install a crystal as close to the LSI as possible and make sure that signals causing noise and power supply wiring are
− Note that oscillation may stop due to condensation.
not near the crystal and its wiring.
Description of Operation
Low-Speed Clock
V
Low-Speed Clock Generation Circuit
C
SS
32.768 kHz
GL
crystal
C
Figure 6-2 Circuit Configuration of 32.768 kHz Crystal Oscillation Mode
DL
DDX
is powered off to stop low-speed oscillation, and the XT0 and XT1 pins become Hiz (Hi
XT1
XT0
V
SS
V
SS
C
C
V
G
D
DDX
R
Control Circuit
F
6 – 6
GL
ML610Q428/ML610Q429 User’s Manual
and C
2× clock
circuit
Chapter 6 Clock Generation Circuit
DL
) as required.
STOP mode
2× low-speed clock
(LSCLK×2)
ENMLT
Low-speed clock
(LSCLK)
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