ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 73
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
- ML610Q428-NNNTBZ03A7 PDF datasheet #2
- ML610Q428-NNNTBZ03A7 PDF datasheet #3
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- Download datasheet (3Mb)
5.2.10
• QSIO0 (bit 0)
• QI2C0 (bit 7)
Address: 0F01AH
Access: R/W
Access size: 8 bits
Initial value: 00H
IRQ2 is a special function register (SFR) to request an interrupt for each interrupt source.
Each IRQ2 request flag is set to “1” regardless of the IE2 and MIE values when an interrupt is generated. In this case,
an interrupt is requested to the CPU when the related flag of the interrupt enable register (IE2) is set to “1” and the
master interrupt enable flag (MIE) is set to “1”.
By setting the IRQ2 request flag to “1” by software, an interrupt can be generated.
The corresponding flag of IRQ2 is set to “0” by hardware when the interrupt request is accepted by the CPU.
[Description of Bits]
Note:
When an interrupt is generated by the write instruction to the interrupt request register (IRQ2) or to the interrupt enable
register (IE2), the interrupt shift cycle starts after the next 1 instruction is executed.
Initial value
QSIO0 is the request flag for the synchronous serial port 0 interrupt (SIO0INT).
QI2C0 is the request flag for the I2C bus 0 interrupt (I2C0INT).
IRQ2
R/W
QSIO0
QI2C0
0
1
0
1
Interrupt Request Register 2 (IRQ2)
No request (initial value)
Request
No request (initial value)
Request
QI2C0
R/W
7
0
R/W
⎯
0
6
R/W
⎯
5
0
Description
Description
R/W
⎯
5 – 14
4
0
R/W
⎯
3
0
ML610Q428/ML610Q429 User’s Manual
R/W
⎯
2
0
Chapter 5 Interrupts (INTs)
R/W
⎯
0
1
QSIO0
R/W
0
0
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