ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 212

• Manufacturer Part Number: ML610Q429-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q429-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.2.7
• I20BB (bit 0)
• I20ACR (bit 1)
• I20ER (bit 2)
Address: 0F2A5H
Access: R/W
Access size: 8 bits
Initial value: 00H
I2C0STAT is a read-only special function register (SFR) to indicate the state of the I
[Description of Bits]
Initial value:
I2C0STAT
The I20ER bit is set to “0” when a write operation to I2C0CON is performed. The I20ER bit is set to “0” when the
The I20BB bit is used to indicate the state of use of the I
the I
this bit is set to “1” even if another master device is using the I
bit of I2C0MOD is “0”.
The I20ACR bit is used to store the acknowledgment signal received. Acknowledgment signals are received each
time the slave address is received and data transmission or reception is completed. The I20ACR bit is set to “0”
when the I20EN bit of I2C0MOD is “0”.
The I20ER bit is a flag to indicate a transmit error. When the value of the bit transmitted and the value of the SDA
pin do not coincide, this bit is set to “1”. When clock synchronization is used (I20SYN = “1”), if the I20ER bit is
set to “1”, the SDA pin output is disabled until the subsequent byte data communication terminates. When clock
synchronization is not used (I20SYN = “0”), SDA pin output continues until the subsequent byte data communication
terminates even if I20ER is set to “1”.
I20EN bit of I2C0MOD is set to “0”.
R
I20ACR
2
I20ER
I20BB
C bus, this bit is set to “1” and when the stop condition is generated, the bit is set to “0”. In multi-master mode,
0
1
0
1
0
1
I
2
C Bus 0 Status Register (I2C0STAT)
I
I
Receives acknowledgment “0”. (Initial value)
Receives acknowledgment “1”.
No transmit error (initial value)
Transmit error
—
R
7
0
2
2
C bus-free state (Initial value)
C bus-busy state
—
R
6
0
—
R
5
0
14 – 8
Description
Description
Description
—
R
4
0
2
C bus interface. When the start condition is generated on
2
C bus. The I20BB bit is set to “0” when the I20EN
—
R
0
3
ML610Q428/ML610Q429 User’s Manual
I20ER
R
2
0
2
C bus interface.
Chapter 14 I
I20ACR
R
1
0
2
C Bus Interface
I20BB
R
0
0