ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 9

• Manufacturer Part Number: ML610Q429-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q429-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 13
Chapter 14
13. UART ........................................................................................................................................................... 13-1
14. I
12.5 About timer0/1 int clock for the transfer clock of the synchronous serial port....................................... 12-15
13.1 Overview................................................................................................................................................... 13-1
13.2 Description of Registers............................................................................................................................ 13-2
13.3 Description of Operation......................................................................................................................... 13-11
13.4 Specifying port registers ......................................................................................................................... 13-18
14.1 Overview................................................................................................................................................... 14-1
14.2 Description of Registers............................................................................................................................ 14-2
14.3 Description of Operation........................................................................................................................... 14-9
14.4 Description of Operation......................................................................................................................... 14-13
12.4.1
12.4.2
12.4.3
12.4.4
13.1.1
13.1.2
13.1.3
13.2.1
13.2.2
13.2.3
13.2.4
13.2.5
13.2.6
13.2.7
13.3.1
13.3.2
13.3.3
13.3.4
13.3.5
13.4.1
13.4.2
14.1.1
14.1.2
14.1.3
14.2.1
14.2.2
14.2.3
14.2.4
14.2.5
14.2.6
14.2.7
14.3.1
14.3.2
14.3.3
14.4.1
14.3.1.1 Start Condition............................................................................................................................... 14-9
14.3.1.2 Restart Condition........................................................................................................................... 14-9
14.3.1.3 Slave Address Transmit Mode....................................................................................................... 14-9
14.3.1.4 Data Transmit Mode...................................................................................................................... 14-9
14.3.1.5 Data Receive Mode ....................................................................................................................... 14-9
14.3.1.6 Control Register Setting Wait State............................................................................................... 14-9
14.3.1.7 Stop Condition............................................................................................................................... 14-9
2
C Bus Interface........................................................................................................................................... 14-1
Functioning P42 (SOUT0), P41 (SCK0) and P40 (SIN0) as the SSIO/ “Master mode” ................ 12-11
Functioning P42 (SOUT0), P41 (SCK0) and P40 (SIN0) as the SSIO/ ”Slave mode”................... 12-12
Functioning P46 (SOUT0), P45 (SCK0) and P44 (SIN0) as the SSIO/ ”Master mode” ................ 12-13
Functioning P46 (SOUT0), P45 (SCK0) and P44 (SIN0) as the SSIO/ ”Slave mode”................... 12-14
Features............................................................................................................................................. 13-1
Configuration .................................................................................................................................... 13-1
List of Pins........................................................................................................................................ 13-1
List of Registers ................................................................................................................................ 13-2
UART0 Transmit/Receive Buffer (UA0BUF).................................................................................. 13-3
UART0 Control Register (UA0CON) .............................................................................................. 13-4
UART0 Mode Register 0 (UA0MOD0) ........................................................................................... 13-5
UART0 Mode Register 1 (UA0MOD1) ........................................................................................... 13-6
UART0 Baud Rate Registers L, H (UA0BRTL, UA0BRTH) .......................................................... 13-8
UART0 Status Register (UA0STAT) ............................................................................................... 13-9
Transfer Data Format...................................................................................................................... 13-11
Baud Rate........................................................................................................................................ 13-12
Transmit Data Direction ................................................................................................................. 13-13
Transmit Operation ......................................................................................................................... 13-14
Receive Operation........................................................................................................................... 13-16
Functioning P43(TXD0) and P42(RXD0) as the UART ................................................................ 13-18
Functioning P43(TXD0) and P02(RXD0) as the UART ................................................................ 13-19
Features............................................................................................................................................. 14-1
Configuration .................................................................................................................................... 14-1
List of Pins........................................................................................................................................ 14-1
List of Registers ................................................................................................................................ 14-2
I
I
I
I
I
I
Communication Operating Mode...................................................................................................... 14-9
Communication Operation Timing ................................................................................................. 14-10
Operation Waveforms..................................................................................................................... 14-12
Functioning P41(SCL) and P40(SDA) as the I2C .......................................................................... 14-13
2
2
2
2
2
2
C Bus 0 Receive Register (I2C0RD).............................................................................................. 14-3
C Bus 0 Slave Address Register (I2C0SA) .................................................................................... 14-4
C Bus 0 Transmit Data Register (I2C0TD) .................................................................................... 14-5
C Bus 0 Control Register (I2C0CON)............................................................................................ 14-6
C Bus 0 Mode Register (I2C0MOD).............................................................................................. 14-7
C Bus 0 Status Register (I2C0STAT) ............................................................................................ 14-8
Contents – 5
ML610Q428/ML610Q429 User’s Manual
Contents