LM97593VH National Semiconductor, LM97593VH Datasheet - Page 33

• Manufacturer Part Number: LM97593VH
• Description: 12BIT ADC, 2CH, DDC/AGC, 128PQFP
• Manufacturer: National Semiconductor

Specifications of LM97593VH

• Resolution (bits): 12bit
• Input Channel Type: Differential
• Data Interface: Serial
• Supply Voltage Range - Analogue: 3V To 3.6V
• Supply Voltage Range - Digital: 1.6V To 2V, 3V To 3.6V
• Supply: RoHS Compliant
• Sampling Rate: 65MSPS
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Not Compliant

rate of 270.833kHz. An OSP starts when a sample is ready
and stops when the next one is ready.
5.1 Serial Outputs
The LM97593 provides a serial clock (SCK), a frame strobe
(SFS) and two data lines (AOUT and BOUT) to output serial
data. The MUX_MODE control register specifies whether the
two channel outputs are transmitted on two separate serial
pins, or multiplexed onto one pin in a time division multiplexed
(TDM) format. Separate output pins are not provided for the I
and Q halves of complex data. The I and Q outputs are always
multiplexed onto the same serial pin. The I-component is out-
put first, followed by the Q-component. By setting the
PACKED mode bit to ‘1’ a complex pair may be treated as a
single double-wide word. The RDY signal is used to identify
the first word of a complex pair of the TDM formatted output
when the SFS_MODE bit is set to ‘0’. Setting SFS_MODE to
‘1’ causes the LM97593 to output a single SFS pulse for each
FIGURE 34. Serial output formats. Refer to Figure 13 for detailed timing information
33
output period. This SFS pulse will be coincident with RDY and
only a single SCK period wide. The TDM modes are summa-
rized in Table 2.
The serial outputs use the format shown in Figure 34. Figure
34(a) shows the standard output mode (the PACKED mode
bit is low). The chip clocks the frame and data out of the chip
SFS_MODE MUX_MODE
0
1
TABLE 2. TDM Modes
0
1
0
1
OUT
OUT
AOUT
OUT
OUT
SERIAL OUTPUTS
A
A
, OUT
, OUT
A
A
B
B
30008732
www.national.com
BOUT
OUT
OUT
LOW
LOW
B
B