DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 31
![16BIT 30MIPS DSPIC, 30F2010, DIP28](/photos/19/0/190081/42268255_sml.jpg)
DSPIC30F2010-30I/SPG
Manufacturer Part Number
DSPIC30F2010-30I/SPG
Description
16BIT 30MIPS DSPIC, 30F2010, DIP28
Manufacturer
Microchip Technology
Series
DsPIC30Fr
Datasheet
1.DSPIC30F2010-30ISPG.pdf
(244 pages)
Specifications of DSPIC30F2010-30I/SPG
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.0
3.1
The program address space is 4M instruction words. It
is addressable by a 24-bit value from either the 23-bit
PC, table instruction EA, or data space EA, when pro-
gram space is mapped into data space, as defined by
Table 3-1. Note that the program space address is
incremented by two between successive program
words, in order to provide compatibility with data space
addressing.
TABLE 3-1:
FIGURE 3-1:
2004 Microchip Technology Inc.
Instruction Access
TBLRD/TBLWT
TBLRD/TBLWT
Program Space Visibility
Note: This data sheet summarizes the features of this family of dsPIC30F devices and is not intended to be a complete reference
source. For complete information on the CPU, peripherals, register descriptions and general device functionality, please refer to the
dsPIC30F Family Reference Manual (DS70046). For complete information on the device instruction set and programming, please
refer to the dsPIC30F Programmer’s Reference Manual (DS70030). For device pinouts and electrical specifications, please refer to
the specific data sheet for the device that will be used in your design.
Access Type
MEMORY ORGANIZATION
Program Address Space
PROGRAM SPACE ADDRESS CONSTRUCTION
Note: Program Space Visibility cannot be used to access bits <23:16> of a word in program memory.
Using
Program
Counter
Using
Program
Space
Visibility
Using
Table
Instruction
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
User
User
(TBLPAG<7> = 0)
Configuration
(TBLPAG<7> = 1)
User
Space
Select
User/
Configuration
Access
1/0
Space
0
0
PSVPAG Reg
TBLPAG Reg
8 bits
Advance Information
8 bits
Select
<23>
0
0
Program Counter
TBLPAG<7:0>
TBLPAG<7:0>
24-bit EA
23 bits
1
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE), for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or configura-
tion space access. In Table 3-1, Read/Write instruc-
tions, bit 23 allows access to the Device ID, the User ID
and the configuration bits. Otherwise, bit 23 is always
clear.
Note:
<22:16>
PSVPAG<7:0>
Program Space Address
15 bits
16 bits
EA
The address map shown in Figure 3-5 is
conceptual, and the actual memory con-
figuration may vary across individual
devices depending on available memory.
EA
PC<22:1>
<15>
Data EA <15:0>
Data EA <15:0>
Select
Byte
0
dsPIC30F
<14:1>
Data EA <14:0>
DS70082E-page 29
<0>
0
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