DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 66
![16BIT 30MIPS DSPIC, 30F2010, DIP28](/photos/19/0/190081/42268255_sml.jpg)
DSPIC30F2010-30I/SPG
Manufacturer Part Number
DSPIC30F2010-30I/SPG
Description
16BIT 30MIPS DSPIC, 30F2010, DIP28
Manufacturer
Microchip Technology
Series
DsPIC30Fr
Datasheet
1.DSPIC30F2010-30ISPG.pdf
(244 pages)
Specifications of DSPIC30F2010-30I/SPG
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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dsPIC30F
7.3.2
To write a block of data EEPROM, write to all sixteen
latches first, then set the NVMCON register and
program the block.
EXAMPLE 7-5:
7.4
Depending on the application, good programming
practice may dictate that the value written to the mem-
ory should be verified against the original value. This
should be used in applications where excessive writes
can stress bits near the specification limit.
DS70082E-page 64
MOV
MOV
MOV
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
TBLWTL
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
Write Verify
WRITING A BLOCK OF DATA
EEPROM
#LOW_ADDR_WORD,W0
#HIGH_ADDR_WORD,W1
W1
#data1,W2
W2
#data2,W2
W2
#data3,W2
W2
#data4,W2
W2
#data5,W2
W2
#data6,W2
W2
#data7,W2
W2
#data8,W2
W2
#data9,W2
W2
#data10,W2
W2
#data11,W2
W2
#data12,W2
W2
#data13,W2
W2
#data14,W2
W2
#data15,W2
W2
#data16,W2
W2
#0x400A,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
TBLPAG
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
[ W0]++
NVMCON
NVMKEY
NVMKEY
DATA EEPROM BLOCK WRITE
; Init pointer
; Get 1st data
; write data
; Get 2nd data
; write data
; Get 3rd data
; write data
; Get 4th data
; write data
; Get 5th data
; write data
; Get 6th data
; write data
; Get 7th data
; write data
; Get 8th data
; write data
; Get 9th data
; write data
; Get 10th data
; write data
; Get 11th data
; write data
; Get 12th data
; write data
; Get 13th data
; write data
; Get 14th data
; write data
; Get 15th data
; write data
; Get 16th data
; write data. The NVMADR captures last table access address.
; Select data EEPROM for multi word op
; Operate Key to allow program operation
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
; Write the 0xAA key
; Start write cycle
Advance Information
7.5
There are conditions when the device may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built-in. On power-up, the WREN bit is cleared;
also, the Power-up Timer prevents EEPROM write.
The write initiate sequence and the WREN bit together,
help prevent an accidental write during brown-out,
power glitch or software malfunction.
Protection Against Spurious Write
2004 Microchip Technology Inc.
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