DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 95

16BIT 30MIPS DSPIC, 30F2010, DIP28

DSPIC30F2010-30I/SPG

Manufacturer Part Number
DSPIC30F2010-30I/SPG
Description
16BIT 30MIPS DSPIC, 30F2010, DIP28
Manufacturer
Microchip Technology
Series
DsPIC30Fr
Datasheet

Specifications of DSPIC30F2010-30I/SPG

Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.0
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining motor positioning data. Incre-
mental encoders are very useful in motor control
applications.
The Quadrature Encoder Interface (QEI) is a key fea-
ture requirement for several motor control applications,
such as Switched Reluctance (SR) and AC Induction
Motor (ACIM). The operational features of the QEI are,
but not limited to:
FIGURE 14-1:
 2004 Microchip Technology Inc.
Note: This data sheet summarizes the features of this family of dsPIC30F devices and is not intended to be a complete reference
source. For complete information on the CPU, peripherals, register descriptions and general device functionality, please refer to the
dsPIC30F Family Reference Manual (DS70046). For complete information on the device instruction set and programming, please
refer to the dsPIC30F Programmer’s Reference Manual (DS70030). For device pinouts and electrical specifications, please refer to
the specific data sheet for the device that will be used in your design.
UPDN
INDX
QEA
QEB
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
Synchronize
Sleep Input
Det
PCDOUT
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
UPDN_SRC
Programmable
Programmable
0
Programmable
1
0
1
Digital Filter
Digital Filter
Digital Filter
QEICON<11>
Existing Pin Logic
Up/Down
T
QEIM<2:0>
CY
Interface Logic
Quadrature
TQCS
Advance Information
Encoder
1
0
Mode Select
QEIM<2:0>
3
TQGATE
1
0
2
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate
Figure 14-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(POSCNT)
(MAXCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
bits
2
QEIM<2:0>
Reset
Equal
dsPIC30F
(QEICON<10:8>).
DS70082E-page 93
QEIIF
Event
Flag

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