AD7711ANZ Analog Devices Inc, AD7711ANZ Datasheet - Page 18

• Manufacturer Part Number: AD7711ANZ
• Description: 24 BIT SIGMA DELTA ADC IC
• Manufacturer: Analog Devices Inc

Specifications of AD7711ANZ

• Rohs Compliant: YES
• Number Of Bits: 24
• Sampling Rate (per Second): 1.03k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 80°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resolution (bits): 24bit
• Sampling Rate: 19.5kSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Analogue: 5V To 10V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

System calibration can also be used to remove any errors from
an antialiasing filter on the analog input. A simple R, C anti-
aliasing filter on the front end may introduce a gain error on the
analog input voltage, but the system calibration can be used to
remove this error.
System Offset Calibration
System offset calibration is a variation of both the system cali-
bration and self-calibration. In this case, the zero-scale point
for the system is presented to the AIN input of the converter.
System offset calibration is initiated by writing 1, 0, 0 to MD2,
MD1, MD0. The system zero-scale coefficient is determined by
converting the voltage applied to the AIN input, while the full-
scale coefficient is determined from the span between this AIN
conversion and a conversion on V
should be applied to the AIN input for the duration of the cali-
bration sequence. This is a one-step calibration sequence with
DRDY going low when the sequence is completed. In unipolar
mode, the system offset calibration is performed between the
two endpoints of the transfer function; in bipolar mode, it is
performed between midscale and positive full scale.
Background Calibration
The AD7711 also offers a background calibration mode where
the part interleaves its calibration procedure with its normal
conversion sequence. In the background calibration mode, the
same voltages are used as the calibration points that are used in
the self-calibration mode, that is, shorted inputs and V
background calibration mode is invoked by writing 1, 0, 1 to
MD2, MD1, MD0 of the control register. When invoked, the
background calibration mode reduces the output data rate of the
AD7711 by a factor of 6 while the –3 dB bandwidth remains
unchanged. The advantage is that the part is continually per-
forming calibration and automatically updating its calibration
coefficients. As a result, the effects of temperature drift, sup-
ply sensitivity, and time drift on zero- and full-scale errors are
automatically removed. When the background calibration mode
is turned on, the part will remain in this mode until Bits MD2,
MD1, and MD0 of the control register are changed. With back-
ground calibration mode on, the first result from the AD7711
will be incorrect because the full-scale calibration will not have
been performed. For a step change on the input, the second
output update will have settled to 100% of the final value.
Table VI summarizes the calibration modes and the calibration
points associated with them. It also gives the duration from
when the calibration is invoked to when valid data is available
to the user.
Cal Type
Self-Cal
System Cal
System Cal
System Offset Cal
Background Cal
AD7711
0, 0, 1
MD2, MD1, MD0
0, 1, 0
0, 1, 1
1, 0, 0
1, 0, 1
REF
. The zero-scale point
Table VI. Calibration Truth Table
Zero-Scale Cal
Shorted Inputs
AIN
AIN
Shorted Inputs
REF
. The
–18–
Span and Offset Limits
Whenever a system calibration mode is used, there are limits on
the amount of offset and span that can be accommodated. The
range of input span in both the unipolar and bipolar modes has a
minimum value of 0.8 ¥ V
2.1 ¥ V
The amount of offset that can be accommodated depends on
whether the unipolar or bipolar mode is being used. This offset
range is limited by the requirement that the positive full-scale
calibration limit is £ 1.05 ¥ V
range plus the span range cannot exceed 1.05 ¥ V
the span is at its minimum (0.8 ¥ V
the offset can be is (0.25 ¥ V
In bipolar mode, the system offset calibration range is again
restricted by the span range. The span range of the converter in
bipolar mode is equidistant around the voltage used for the zero-
scale point; thus the offset range plus half the span range cannot
exceed (1.05 ¥ V
the offset span cannot move more than ± (0.05 ¥ V
before the endpoints of the transfer function exceed the input
overrange limits ± (1.05 ¥ V
the minimum ± (0.4 ¥ V
offset range is ± (0.65
POWER-UP AND CALIBRATION
On power-up, the AD7711 performs an internal reset that sets
the contents of the control register to a known state. However, to
ensure correct calibration for the device, a calibration routine
should be performed after power-up.
The power dissipation and temperature drift of the AD7711
are low, and no warm-up time is required before the initial
calibration is performed. However, if an external reference is
being used, this reference must have stabilized before calibra-
tion is initiated.
Drift Considerations
The AD7711 uses chopper stabilization techniques to minimize
input offset drift. Charge injection in the analog switches and dc
leakage currents at the sampling node are the primary sources of
offset voltage drift in the converter. The dc input leakage current is
essentially independent of the selected gain. Gain drift within the
converter depends primarily upon the temperature tracking of the
internal capacitors. It is not affected by leakage currents.
Full-Scale Cal
V
AIN
V
V
REF
REF
REF
REF
/GAIN.
REF
/GAIN). If the span is set to 2 ¥ V
¥ V
REF
Sequence
One-Step
Two-Step
Two-Step
One-Step
One-Step
REF
REF
/GAIN), the maximum
REF
REF
REF
/GAIN and a maximum value of
/GAIN).
/GAIN). If the span range is set to
/GAIN).
/GAIN. Therefore, the offset
REF
/GAIN), the maximum
Duration
9 ¥ 1/Output Rate
4 ¥ 1/Output Rate
4 ¥ 1/Output Rate
9 ¥ 1/Output Rate
6 ¥ 1/Output Rate
REF
REF
allowable
/GAIN. If
REF
/GAIN)
/GAIN,
REV. G