AD7711ANZ Analog Devices Inc, AD7711ANZ Datasheet - Page 8

• Manufacturer Part Number: AD7711ANZ
• Description: 24 BIT SIGMA DELTA ADC IC
• Manufacturer: Analog Devices Inc

Specifications of AD7711ANZ

• Rohs Compliant: YES
• Number Of Bits: 24
• Sampling Rate (per Second): 1.03k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 80°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resolution (bits): 24bit
• Sampling Rate: 19.5kSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Analogue: 5V To 10V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Mnemonic
20
21
TERMINOLOGY
Intergral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The end-
points of the transfer function are zero-scale (not to be confused
with bipolar zero), a point 0.5 LSB below the first code transi-
tion (000 . . . 000 to 000 . . . 001) and full scale, a point 0.5 LSB
above the last code transition (111 . . . 110 to 111 . . . 111). The
error is expressed as a percentage of full scale.
Positive Full-Scale Error
Positive full-scale error is the deviation of the last code transi-
tion (111 . . . 110 to 111 . . . 111) from the ideal input full-scale
voltage. For AIN1(+), the ideal full-scale input voltage is
(AIN1(–) + V
scale input voltage is V
unipolar and bipolar analog input ranges.
Unipolar Offset Error
Unipolar offset error is the deviation of the first code transition
from the ideal voltage. For AIN1(+), the ideal input voltage is
(AIN1(–) + 0.5 LSB); for AIN2, the ideal input is 0.5 LSB
when operating in the unipolar mode.
Bipolar Zero Error
This is the deviation of the midscale transition (0111 . . . 111
to 1000 . . . 000) from the ideal input voltage. For AIN1(+), the
ideal input voltage is (AIN1(–) – 0.5 LSB); for AIN2, the ideal
input is – 0.5 LSB when operating in the bipolar mode.
Bipolar Negative Full-Scale Error
This is the deviation of the first code transition from the ideal
input voltage. For (AIN1(+), the ideal input voltage is (AIN1(–)
– V
+ 0.5 LSB when operating in the bipolar mode.
AD7711
22
23
24
REF
RFS
DRDY
SDATA
DV
DGND
/GAIN + 0.5 LSB); for AIN2 the ideal input is – V
DD
REF
/GAIN – 3/2 LSBs); for AIN2, the ideal full-
REF
Function
Receive Frame Synchronization. Active low logic input used to access serial data from the device. In the
self-clocking mode, the SCLK and SDATA lines both become active after RFS goes low. In the external
clocking mode, the SDATA line becomes active after RFS goes low.
Logic Output. A falling edge indicates that a new output word is available for transmission. The DRDY pin
will return high upon completion of transmission of a full output word. DRDY is also used to indicate
when the AD7711 has completed its on-chip calibration sequence.
Serial Data. Input/output with serial data being written to either the control register or the calibration
registers and serial data being accessed from the control register, calibration registers, or the data register.
During an output data read operation, serial data becomes active after RFS goes low (provided DRDY is
low). During a write operation, valid serial data is expected on the rising edges of SCLK when TFS is low.
The output data coding is natural binary for unipolar inputs and offset binary for bipolar inputs.
Digital Supply Voltage, 5 V. DV
Ground Reference Point for Digital Circuitry.
/GAIN – 3/2 LSBs. It applies to both
REF
/GAIN
DD
should not exceed AV
–8–
Positive Full-Scale Overrange
Positive full-scale overrange is the amount of overhead avail-
able to handle input voltages on the AIN1(+) input greater
than AIN1(–) + V
than + V
voltages due to system gain errors in system calibration rou-
tines) without introducing errors due to overloading the analog
modulator or to overflowing the digital filter.
Negative Full-Scale Overrange
This is the amount of overhead available to handle voltages on
AIN1(+) below AIN1(–) – V
–V
flowing the digital filter. Note that the analog input will accept
negative voltage peaks on AIN1(+) even in the unipolar mode
provided that AIN1(+) is greater than AIN1(–) and greater than
V
Offset Calibration Range
In the system calibration modes, the AD7711 calibrates its
offset with respect to the analog input. The offset calibration
range specification defines the range of voltages that the AD7711
can accept and still calibrate offset accurately.
Full-Scale Calibration Range
This is the range of voltages that the AD7711 can accept in the
system calibration mode and still calibrate full-scale correctly.
Input Span
In system calibration schemes, two voltages applied in sequence
to the AD7711’s analog input define the analog input range.
The input span specification defines the minimum and maxi-
mum input voltages from zero- to full-scale that the AD7711
can accept and still calibrate gain accurately.
SS
REF
– 30 mV.
/GAIN without overloading the analog modulator or over-
REF
/GAIN (for example, noise peaks or excess
DD
by more than 0.3 V in normal operation.
REF
/GAIN or on the AIN2 input greater
REF
/GAIN or on AIN2 below
REV. G