AD7711ANZ Analog Devices Inc, AD7711ANZ Datasheet - Page 26

• Manufacturer Part Number: AD7711ANZ
• Description: 24 BIT SIGMA DELTA ADC IC
• Manufacturer: Analog Devices Inc

Specifications of AD7711ANZ

• Rohs Compliant: YES
• Number Of Bits: 24
• Sampling Rate (per Second): 1.03k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 80°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resolution (bits): 24bit
• Sampling Rate: 19.5kSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Analogue: 5V To 10V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MOV SCON,#00000000B;
MOV IE,#10010000B;
MOV IP,#00010000B;
SETB 91H;
SETB 90H;
MOV R1,#003H;
MOV R0,#030H;
MOV A,#00H;
MOV SBUF,A;
WAIT:
JMP WAIT;
INT ROUTINE:
NOP;
MOV A,R1;
JZ FIN;
DEC R1;
MOV A,@R;
INC R0;
RLC A;
MOV B.0,C; RLC A; MOV B.1,C; RLC A;
MOV B.2,C; RLC A; MOV B.3,C; RLC A;
MOV B.4,C; RLC A; MOV B.5,C; RLC A;
MOV B.6,C; RLC A; MOV B.7,C; MOV A,B;
CLR 93H;
CLR 91H;
MOV SBUF,A;
RETI;
FIN:
SETB 91H;
SETB 93H;
RETI;
AD7711 to 68HC11 Interface
Figure 18 shows an interface between the AD7711 and the
68HC11 microcontroller. The AD7711 is configured for its
external clocking mode, while the SPI port is used on the
68HC11 is in single-chip mode. The DRDY line from the
AD7711 is connected to the Port PC2 input of the 68HC11, so
the DRDY line is polled by the 68HC11. The DRDY line can
be connected to the IRQ input of the 68HC11 if an interrupt
driven system is preferred. The 68HC11 MOSI and MISO lines
should be configured for wire-OR operation. Depending on the
interface configuration, it may be necessary to provide bidirec-
tional buffers between the 68HC11 MOSI and MISO lines.
The 68HC11 is configured in the master mode with its CPOL
Logic 0 bit set to a Logic 0 and its CPHA bit set to a Logic 1.
With a 10 MHz master clock on the AD7711, the interface will
operate with all four serial clock rates of the 68HC11.
AD7711
Table VIII. 8XC51 Code for Writing to the AD7711
Configure 8051 for MODE 0
and Enable Serial Reception
Enable Transmit Interrupt
Prioritize the Transmit Interrupt
Bring TFS High
Bring RFS High
Sets Number of Bytes to Be Written
in a Write Operation
Start Address in RAM for Bytes
Clear Accumulator
Initialize the Serial Port
Wait for Interrupt
Interrupt Subroutine
Load R1 to Accumulator
If Zero Jump to FIN
Decrement R1 Byte Counter
Move Byte into the Accumulator
Increment Address
Rearrange Data from LSB First
to MSB First
Bring A0 Low
Bring TFS Low
Write to Serial Port
Return from Subroutine
Set TFS High
Set A0 High
Return from Interrupt Subroutine
–26–
APPLICATIONS
4-Wire RTD Configurations
Figure 19 shows a 4-wire RTD application where the RTD
transducer is interfaced directly to the AD7711. In the 4-wire
configuration, there are no errors associated with lead resistances
because no current flows in the measurement leads connected to
AIN1(+) and AIN1(–). One of the RTD current sources is used
to provide the excitation current for the RTD. A common nominal
resistance value for the RTD is 100 W and, therefore, the RTD
will generate a 20 mV signal that can be handled directly by the
analog input of the AD7711. In the circuit shown, the second
RTD excitation current is used to generate the reference voltage
for the AD7711. This reference voltage is developed across R
and applied to the differential reference inputs. For the nominal
reference voltage of 2.5 V, R
that the analog input voltage span remains ratiometric to the
reference voltage. Any errors in the analog input voltage due to
the temperature drift of the RTD current source is compensated
for by the variation in the reference voltage. The typical matching
between the RTD current sources is less than 3 ppm/∞C.
Figure 19. 4-Wire RTD Application with the AD7711
68HC11
R
REF
Figure 18. AD7711 to 68HC11 Interface
RTD
MISO
MOSI
SCK
PC0
PC3
PC1
PC2
SS
REF IN(+)
REF IN(–)
AIN1(+)
AIN1(–)
AGND
RTD2
RTD1
DV
DD
5V
AV
REF
V
DD
200 A
200 A
SS
is 12.5 kW. This scheme ensures
DV
AD7711
PGA
CIRCUITRY
INTERNAL
DV
DGND
DD
DD
SYNC
A = 1–128
RFS
TFS
DRDY
A0
SCLK
SDATA
MODE
AD7711
REV. G
REF