PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 100

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F785/HV785
13.7
Figure 13-4 shows an example of a single phase buck
voltage regulator application. The PWM output drives
Q1 with pulses to alternately charge and discharge L1.
C4 holds the charge from L1 during the inactive cycle
of the drive period. R4 and C3 form a ramp generator.
At the beginning of the PWM period, the PWM output
goes high causing the voltage on C3 to rise concur-
rently with the current in L1. When the voltage across
C3 reaches the threshold level present at the positive
input of Comparator 1, the comparator output changes
and terminates the drive output from the PWM to Q1.
When Q1 is not driven, the current path to L1 through
Q1 is interrupted, but since the current in L1 cannot
stop instantly, the current continues to flow through D2
as L1 discharges into C4. D1 quickly discharges C3 in
preparation of the next ramp cycle.
FIGURE 13-4:
DS41249E-page 98
R1
C1
C2
Example Single Phase Application
R2
C5
R3
EXAMPLE SINGLE PHASE APPLICATION
OPA1
CCP
VR
C1
PIC16F785
T
WO
F
PWM
OSC
-Phase
Resistor divider R5 and R6 scale the output voltage,
which is inverted and amplified by Op Amp 1, relative
to the reference voltage present at the non-inverting pin
of the op amp. R3, C5 and C2 form the inverting stabi-
lization gain feedback of the amplifier. The VR refer-
ence supplies a stable reference to the non-inverting
input of the op amp, which is tweaked by the voltage
source created by a secondary time based PWM
output of the CCP and R1 and C1.
Output regulation occurs by the following principle: If
the regulator output voltage is too low, then the voltage
to the non-inverting input of Comparator 1 will rise,
resulting in a higher threshold voltage and, conse-
quently, longer PWM drive pulses into Q1. If the output
voltage is too high, then the voltage to the non-inverting
input of Comparator 1 will fall, resulting in shorter PWM
drive pulses into Q1.
PH1
R4
C3
FET
Driver
D1
© 2008 Microchip Technology Inc.
V
Q1
UNREG
D2
L1
C4
R6
R5