PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 47

20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,

PIC16F785-E/SS

Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.4
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC (Register 4-
8). Setting a TRISC bit (= 1) will make the correspond-
ing PORTC pin an input (i.e., put the corresponding
output driver in a High-Impedance mode). Clearing a
TRISC bit (= 0) will make the corresponding PORTC
pin an output (i.e., put the contents of the output latch
on the selected pin). Example 4-3 shows how to initial-
ize PORTC.
Reading the PORTC register (Register 4-7) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the port data latch.
The TRISC register controls the direction of the
PORTC pins, even when they are being used as
analog inputs. The user must ensure the bits in the
TRISC register are maintained set when using them as
analog inputs. I/O pins configured as analog input
always read ‘0’.
REGISTER 4-7:
REGISTER 4-8:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the corresponding analog select bit
R/W-x
TRISC7
R/W-1
RC7
PORTC and TRISC Registers
(1)
is ‘1’ (see Registers
RC<7:0>: PORTC General Purpose I/O Pin bits
1 = Port pin is greater than V
0 = Port pin is less than V
TRISC<7:0>: PORTC Tri-State Control bits
1 = PORTC pin configured as an input (tri-stated)
0 = PORTC pin configured as an output
R/W-x
TRISC6
R/W-1
RC6
PORTC: PORTC REGISTER
TRISC: PORTC TRI-STATE REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
12-1
TRISC5
R/W-1
R/W-x
RC5
and
12-2 on page 82
IL
IH
TRISC4
R/W-1
R/W-x
RC4
).
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-x
TRISC3
R/W-1
When RC4 or RC5 is configured as an op amp output,
the corresponding RC4 or RC5 digital output driver will
automatically be disabled regardless of the TRISC<4>
or TRISC<5> value.
EXAMPLE 4-3:
RC3
BCF
BCF
CLRF
BSF
CLRF
CLRF
MOVLW
MOVWF
BCF
Note:
(1)
PIC16F785/HV785
STATUS,RP0
STATUS,RP1
PORTC
STATUS,RP0
ANSEL0
ANSEL1
0Ch
TRISC
STATUS,RP0
The ANSEL0 (91h) and ANSEL1 (93h)
registers must be initialized to configure
an analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
R/W-x
TRISC2
R/W-1
RC2
(1)
INITIALIZING PORTC
x = Bit is unknown
x = Bit is unknown
;Bank 0
;Init PORTC
;Bank 1
;digital I/O
;digital I/O
;Set RC<3:2> as inputs
; and set RC<5:4,1:0>
; as outputs
;Bank 0
R/W-x
TRISC1
R/W-1
RC1
(1)
DS41249E-page 45
R/W-x
TRISC0
R/W-1
RC0
(1)
bit 0
bit 0

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