PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 123

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.5
For PIC16F785/HV785, the WDT has been modified
from previous PIC16FXXX devices. The new WDT is
code and functionally compatible with previous
PIC16FXXX WDT modules and adds a 16-bit prescaler
to the WDT. This allows the user to scale the value for
the WDT and TMR0 at the same time. In addition, the
WDT time out value can be extended to 268 seconds.
WDT is cleared under certain conditions described in
Table 15-7.
15.5.1
The WDT derives its time base from the 31 kHz LFIN-
TOSC. The LTS bit does not reflect that the LFINTOSC
is enabled (OSCON<1>).
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 16 ms, which is
compatible with the time base generated with previous
PIC16FXXX microcontroller versions.
A new prescaler has been added to the path between
the INTRC and the multiplexers used to select the path
for the WDT. This prescaler is 16 bits and can be
programmed to divide the INTRC by 128 to 65536,
giving the time base used for the WDT a nominal range
of 1 ms to 268s.
FIGURE 15-9:
TABLE 15-7:
© 2008 Microchip Technology Inc.
WDTE = 0
CLRWDT command
OSC FAIL detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTRC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Note:
Note
LFINTOSC Clock
Watchdog Timer (WDT)
1:
31 kHz
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
This is the shared Timer0/WDT prescaler. See Section 5.4 “Prescaler” for more information.
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from Configuration Word
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
15.5.2
The WDTE bit is located in the Configuration Word.
When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word register
is set, the SWDTEN bit of the WDTCON Register has
no effect. If WDTE is clear, then the SWDTEN bit can
be used to enable and disable the WDT. Setting the bit
will enable it and clearing the bit will disable it.
The PSA and PS<2:0> bits of the OPTION Register
have the same function as in previous versions of the
PIC16FXXX
Section 5.0 “Timer0 Module” for more information.
PIC16F785/HV785
PSA
0
1
WDT CONTROL
family
Cleared until the end of OST
WDT Time-out
0
Prescaler
of
8-bit
1
8
microcontrollers.
(1)
Cleared
WDT
DS41249E-page 121
PSA
PS<2:0>
TO TMR0
See