PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 40

20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,

PIC16F785-E/SS

Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F785/HV785
4.2.3
Each PORTA pin is multiplexed with other functions.
The pins and their combined functions are briefly
described here. For specific information about individ-
ual functions such as the comparator or the A/D, refer
to the appropriate section in this Data Sheet.
4.2.3.1
Figure 4-1 shows the diagram for this pin. The RA0 pin
is configurable to function as one of the following:
• General purpose I/O
• Analog input for the A/D
• Analog input to Comparator 1
• In-Circuit Serial Programming
FIGURE 4-1:
DS41249E-page 38
Data Bus
PORTA
PORTA
WPUA
WPUA
TRISA
TRISA
Interrupt-on-
IOCA
IOCA
WR
WR
WR
WR
RD
RD
RD
RD
change
To Comparator
To A/D Converter
D
D
D
D
PORTA PIN DESCRIPTIONS AND
DIAGRAMS
CK
CK
CK
CK
RA0/AN0/C1IN+/ICSPDAT
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA0
RD PORTA
ANS0
RAPU
ANS0
Q
Q
Q
data
EN
EN
EN
D
D
D
V
DD
Weak
Q1
V
V
DD
SS
I/O pin
Q3
4.2.3.2
Figure 4-1 shows the diagram for this pin. The RA1 pin
is configurable to function as one of the following:
• General purpose I/O
• Analog input for the A/D
• Analog input to Comparators 1 and 2
• Voltage reference input for the A/D
• Buffered or unbuffered voltage reference output
• In-Circuit Serial Programming clock
FIGURE 4-2:
Data Bus
VR
VROE*VREN
CVROE
ANS1
PORTA
PORTA
WPUA
WPUA
TRISA
TRISA
Interrupt-on-
IOCA
IOCA
WR
WR
WR
WR
RD
RD
RD
RD
OUT
change
D
D
D
D
CK
To Comparators
To A/D Converter
CK
CK
CK
RA1/AN1/C12IN0-/V
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA1
RD PORTA
© 2008 Microchip Technology Inc.
RAPU
Q
Q
Q
EN
EN
EN
REF
D
D
D
/ICSPCLK
V
DD
Q1
Weak
V
V
DD
SS
I/O pin
Q3

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