PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 52

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F785/HV785
5.3
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI, with the internal phase clocks, is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T0CKI to be high for at least 2T
a small RC delay of 20 ns) and low for at least 2T
(and a small RC delay of 20 ns). Refer to the electrical
specification of the desired device.
5.4
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. For simplicity, this counter will be referred to as
“prescaler” throughout this Data Sheet. The prescaler
assignment is controlled in software by the control bit
PSA of the OPTION Register. Clearing the PSA bit will
assign the prescaler to Timer0. Prescale values are
selectable via the PS<2:0> bits of the OPTION Regis-
ter.
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing
to the TMR0 register (e.g., CLRF 1,
BSF 1,x....etc.) will clear the prescaler. When
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer.
TABLE 5-1:
DS41249E-page 50
Name
ANSEL0
INTCON
OPTION_REG
TMR0
TRISA
Legend:
Using Timer0 with an External
Clock
Prescaler
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0 module.
Timer0 Module Register
RAPU
ANS7
Bit 7
GIE
—
REGISTERS ASSOCIATED WITH TIMER0
INTEDG
ANS6
PEIE
Bit 6
—
TRISA5
ANS5
T0CS
Bit 5
T0IE
TRISA4
MOVWF 1,
ANS4
T0SE
INTE
Bit 4
OSC
(and
OSC
TRISA3
ANS3
RAIE
Bit 3
PSA
TRISA2
5.4.1
The prescaler assignment is fully under software
control (i.e., it can be changed “on the fly” during
program execution). To avoid an unintended device
Reset, the following instruction sequence (Example 5-
1 and Example 5-2) must be executed when changing
the prescaler assignment between Timer0 and WDT.
EXAMPLE 5-1:
To change prescaler from the WDT to the TMR0
module, use the sequence shown in Example 5-2. This
precaution must be taken even if the WDT is disabled.
EXAMPLE 5-2:
ANS2
Bit 2
T0IF
BCF
BCF
CLRWDT
CLRF
BSF
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
BCF
PS2
CLRWDT
BSF
BCF
MOVLW
MOVWF
BCF
TRISA1
STATUS,RP0
STATUS,RP1
TMR0
STATUS,RP0
b’00101111’
OPTION_REG
b’00101xxx’
OPTION_REG
STATUS,RP0
ANS1
STATUS,RP0
STATUS,RP1
b’xxxx0xxx’
OPTION_REG
STATUS,RP0
Bit 1
INTF
PS1
SWITCHING PRESCALER
ASSIGNMENT
TRISA0
ANS0
RAIF
Bit 0
PS0
CHANGING PRESCALER
(TIMER0→WDT)
CHANGING PRESCALER
(WDT→TIMER0)
© 2008 Microchip Technology Inc.
;Bank 0
;
;Clear WDT
;Clear TMR0 and
; prescaler
;Bank 1
;Required if desired
; PS2:PS0 is
; 000 or 001
;
;Set postscaler to
; desired WDT rate
;Bank 0
;Clear WDT and
; prescaler
;Bank 1
;
;Select TMR0,
; prescale, and
; clock source
;
;Bank 0
1111 1111
0000 0000
1111 1111
xxxx xxxx
--11 1111
POR, BOR
Value on
other Resets
Value on all
1111 1111
0000 0000
1111 1111
uuuu uuuu
--11 1111