IPR-SDRAM/DDR2 Altera, IPR-SDRAM/DDR2 Datasheet - Page 77
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IPR-SDRAM/DDR2
Manufacturer Part Number
IPR-SDRAM/DDR2
Description
IP CORE Renewal Of IP-SDRAM/DDR2
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-SDRAM/DDR2
Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
Cyclone, HardCopy, Stratix
Features
Data Mask Signals For Partial Write Operations, Bank Management Architecture
Core Architecture
FPGA
Core Sub-architecture
Cyclone, HardCopy, Stratix
Rohs Compliant
NA
Function
DDR2 SDRAM Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Chapter 3: Functional Description
MegaCore Verification
Manual Timings
MegaCore Verification
Simulation Testing
Hardware Testing
Table 3–25. Altera Development Boards
© March 2009 Altera Corporation
Stratix II High-Speed IO Development Board
Stratix II PCI Development Board
Stratix PCI Development Board
Stratix PCI Development Board, Professional
Edition
Stratix GX High-Speed Development Board
Internal Stratix Memory Test Board
Nios Development Board, Cyclone II
(EP2C35)
Cyclone II EP2C35 PCI Development Board
Cyclone II EP2C35 DSP Development Board
Cyclone Memory Board
Internal Cyclone Memory Test Board
Development Board
The manual timing settings do not need to be changed under normal circumstances.
For more information on the manual timing settings, refer to
Settings” on page
MegaCore verification involves simulation testing and hardware testing.
Altera has carried out extensive random, directed tests with functional test coverage
using industry-standard Denali models to ensure the functionality of the DDR and
DDR2 SDRAM controller. In addition, Altera has carried out a wide variety of gate-
level tests of the DDR and DDR2 SDRAM controllers to verify the post-compilation
functionality of the controllers.
Table 3–25
the DDR and DDR2 SDRAM controllers.
shows the Altera development boards on which Altera hardware tested
A–1.
EP2S60F1020C3
EP2S60F1020C3
EP1S25F1020C5
EP1S60F1020C6
EP1SGX25FF1020C6ES
EP1S25F780C5
EP2C35F672C6
EP2C35F672C6
EP2C35F672C6
EP1C6Q240C6
EP1C20F400C6
Altera Device
DDR and DDR2 SDRAM Controller Compiler User Guide
Micron DDR2-533 DIMM (MT8HTF3272AG-
53EB3ES)
Infineon DDR400 SO-DIMM
(HYS64D32020GDL-5-B)
Infineon DDR400 SO-DIMM
(HYS64D32020GDL-5-B)
Micron DDR333 SO-DIMM
(MT8VDDT3264HG-335C2)
Micron DDR400 DIMM
(MT16VDDT3264AG-40BB5)
Micron DDR400 DIMM
(MT16VDDT3264AG-40BB5)
Micron 128-Mbit DDR-333 device
(MT46V16M16-6T)
Micron 256-Mbit DDR2-533 device
(MT47H16M16BG-37E)
Micron DDR2-533 DIMM (MT8HTF3264AY-
40EB3)
Micron 128-Mbit DDR266 device
(MT46V8M16-75)
Micron DDR266 DIMM
(MT16VDDT3264AG-265B1)
Memory Device
“Manual Timing
3–41