PACCLK5406D-S-EVN Lattice, PACCLK5406D-S-EVN Datasheet - Page 23

• Manufacturer Part Number: PACCLK5406D-S-EVN
• Description: Development Software ispClock5312S Eval 56020A Dev Mix Sig
• Manufacturer: Lattice

Specifications of PACCLK5406D-S-EVN

• Tool Type: Development Software Support
• Core Architecture: CPLD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 23. USB Settings Dialog Box
6. Enable Connect at startup and click OK.
Figure 24. PAC-Designer JTAG Prompt
7. Click OK to dismiss the message.
8. Close PAC-Designer.
Programming the Evaluation Board
To repgrogram the ispClock5400D Evaluation Board:
1. Run PAC-Designer.
2. Open the <demo>.pac project file.
3. Choose Tools > Download
An information dialog appears. After altering the USB setting within these dialog boxes, PAC-Designer must be
restarted to load the port drivers for the system.
The Frequency Summary dialog appears and reports the Reference and VCO frequency settings.
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ispClock5400D Evaluation Board
User’s Guide