PACCLK5406D-S-EVN Lattice, PACCLK5406D-S-EVN Datasheet - Page 30

• Manufacturer Part Number: PACCLK5406D-S-EVN
• Description: Development Software ispClock5312S Eval 56020A Dev Mix Sig
• Manufacturer: Lattice

Specifications of PACCLK5406D-S-EVN

• Tool Type: Development Software Support
• Core Architecture: CPLD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 2. Pin Information and Bank Summary (Continued)
Glossary
I
LED: Light-Emitting Diode.
PCB: Printed Circuit Board.
RoHS: Restriction of Hazardous Substances Directive.
PLL: Phase Locked Loop.
References
The following documentation is recommended for evaluation and demonstrations:
• AN6080:
• AN6081:
• EB44:
• EB39:
Ordering Information
ispClock5400D Evaluation Board
Note:
2
C: Inter-Integrated Circuit.
ispClock5400D Family Data Sheet
LatticeECP3 Serial Protocol Board User’s Guide
LatticeECP3 Video Protocol Board User’s Guide
Using a Low-Cost CMOS Oscillator as a Reference Clock for SERDES Applications
Driving SERDES Devices with the ispClock5400D Differential Clock Buffer
Pin #
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Description
BANK_0N
BANK_0P
GNDO_0
VCCJ
TDO
TMS
TCK
TDI
RESETb
GNDD
VCCD
USER3
USER2
USER1
USER0
version 01.2, November 2009.
Pin Function
PACCLK5406D-S-EVN
Ordering Part Number
30
Bank
0
0
0
ispClock5400D Evaluation Board
China RoHS Environment-Friendly
BANK_0N
BANK_0P
GND
VCC
TDO
TMS
TCK
TDI
RESETb
GND
VCC
USER3
SCL
SCA
USER0
Use Period (EFUP)
Board Connection
User’s Guide