PACCLK5406D-S-EVN Lattice, PACCLK5406D-S-EVN Datasheet - Page 29

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PACCLK5406D-S-EVN

Manufacturer Part Number
PACCLK5406D-S-EVN
Description
Development Software ispClock5312S Eval 56020A Dev Mix Sig
Manufacturer
Lattice
Datasheet

Specifications of PACCLK5406D-S-EVN

Tool Type
Development Software Support
Core Architecture
CPLD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
5. Rerun the ispClock5406D I
Environmental Requirements
The evaluation board must be stored between -40°C and 100°C. The recommended operating temperature is
between 0°C and 55°C.
The evaluation board can be damaged without proper anti-static handling.
Pin Information and Bank Summary
This section describes the pin information for the ispClock5406D device and board connections.
Table 2. Pin Information and Bank Summary
ispClock_5400_I2C_OutGroup_Sch.emf
ispClock_5400_I2C_PLL_Sch.emf
Pin #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
1
2
3
4
5
6
7
8
9
GNDO_5
BANK_5P
BANK_5N
VCCO_5
VCCO_4
BANK_4P
BANK_4N
GNDO_4
GNDO_3
BANK_3P
BANK_3N
VCCO_3
GNDA
REFAVTT
REFAN
REFAP
REFBVTT
REFBN
REFBP
FBKVTT
FBKN
FBKP
VCCA
RREF
VCCO_2
BANK_2N
BANK_2P
GNDO_2
GNDO_1
BANK_1N
BANK_1P
VCCO_1
VCCO_0
2
C Utility.
Pin Function
29
Bank
5
5
5
5
4
4
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
ispClock5400D Evaluation Board
GND
BANK_5P
BANK_5N
VCCO_5
VCCO_4
BANK_4P
BANK_4N
GND
GND
BANK_3P
BANK_3N
VCCO_3
GND
GND
REFA_N
REFA_P
REFB_VTT
REFB_N
REFB_P
FBK_VTT
FBK_N
FBK_P
VCCA
VCCO_2
BANK_2N
BANK_2P
GND
GND
VCCO_0
Board Connection
User’s Guide

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