ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 106

Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.

ADUC7036BCPZ-RL

Manufacturer Part Number
ADUC7036BCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7036BCPZ-RL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADuC7036
UART Control Register 0
Name: COMCON0
Address: 0xFFFF070C
Default Value: 0x00
Access: Read/write
Function: This 8-bit register controls the operation of the UART in conjunction with COMCON1.
Table 81. COMCON0 MMR Bit Designations
Bit
7
6
5
4
3
2
1 to 0
UART Control Register 1
Name: COMCON1
Address: 0xFFFF0710
Default Value: 0x00
Access: Read/write
Function: This 8-bit register controls the operation of the UART in conjunction with COMCON0.
Table 82. COMCON1 MMR Bit Designations
Bit
7 to 6
5
4
3 to 0
Name
DLAB
BRK
Stop
Name
LOOPBACK
SP
EPS
PEN
WLS
SMS
Description
Divisor latch access.
Set by user to enable access to COMDIV0 and COMDIV1.
Cleared by user to disable access to COMDIV0 and COMDIV1 and to enable access to COMRX, COMTX, and
COMIEN0.
Set break.
Set by user to force TxD to 0.
Cleared to operate in normal mode.
Stick parity. Set by user to force parity to defined values.
1 if EPS = 1 and PEN = 1.
0 if EPS = 0 and PEN = 1.
Even parity select bit.
Set for even parity.
Cleared for odd parity.
Parity enable bit.
Set by user to transmit and check the parity bit.
Cleared by user for no parity transmission or checking.
Stop bit.
Set by user to transmit 1.5 stop bits if the word length is five bits, or two stop bits if the word length is six, seven, or
eight bits. The receiver checks the first stop bit only, regardless of the number of stop bits selected.
Cleared by the user to generate one stop bit in the transmitted data.
Word length select.
00 = five bits.
01 = six bits.
10 = seven bits.
11 = eight bits.
Description
UART input mux.
00 = RxD driven by LIN input; required for LIN communications using the LIN pin.
01 = reserved.
10 = RxD driven by GP5; required for serial communications using the GPIO_5/IRQ1/RxD pin (RxD).
11 = reserved.
Reserved. Not used.
Loopback. Set by user to enable loopback mode. In loopback mode, the TxD is forced high.
Reserved. Not used.
Rev. C | Page 106 of 132

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