ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 124

• Manufacturer Part Number: ADUC7036BCPZ-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7036BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7036
BIT SERIAL DEVICE (BSD) INTERFACE
BSD is a pulse-width-modulated signal with three possible states:
sync, 0, and 1. These are detailed, along with their associated
tolerances, in Table 95. The frame length is 19 bits, and commu-
nication occurs at 1200 bps ± 3%.
Table 95. BSD Bit Level Description
Parameter
TxD Rate
Bit Encoding
t
t
t
SYNC
0
1
GPSDAT[21]
GP2DAT[29]
Min
1164
1/16
5/16
10/16
GPIO_12
131kHz
LHS INTERRUPT
5MHz
AND
IRQEN[7]
Typ
1200
2/16
6/16
12/16
ADuC7036
ADuC7036
HARDWARE
LHSVAL0
LHSVAL1
UART
LHS
RxD ENABLE
LHSCON0[8]
GP2CON[20]
FUNCTION
RxD
TxD
GPIO_12
SELECT
Max
1236
3/16
8/16
14/16
INTERRUPT
LOGIC
LHS
Figure 53. BSD I/O Hardware Interface
DISABLE
OUTPUT
Unit
bps
t
t
t
SHORT-CIRCUIT
PERIOD
PERIOD
PERIOD
HVCFG0[1:0]
LIN MODE
HVCFG1[2]
CONTROL
FOUR LIN
INTERRUPT
SOURCES
BREAK LHSSTA[0]
START LHSSTA[1]
STOP LHSSTA[2]
BREAK
ERROR LHSSTA[4]
Rev. C | Page 124 of 132
INPUT
VOLTAGE
THRESHOLD
REFERENCE
BPF
TRIP REFERENCE
SHORT-CIRCUIT
INTERNAL
BSD COMMUNICATION HARDWARE INTERFACE
The ADuC7036 emulates the BSD communication protocol
using a GPIO, an IRQ, and the LIN synchronization hardware,
all of which are under software control.
VDD
INTERNAL
SHORT-CIRCUIT
SENSE
RESISTOR
OVERVOLTAGE
PROTECTION
LIN ENABLE
(INTERNAL
HVCFG0[5]
PULL-UP)
EXTERNAL
IO_VSS
LIN PIN
SCR
VDD
MASTER ECU
PROTECTION
DIODE
MASTER ECU
PULL-UP
C
LOAD