ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 84

• Manufacturer Part Number: ADUC7036BCPZ-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7036BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7036
GENERAL-PURPOSE I/O
The ADuC7036 features nine general-purpose bidirectional input/
output (GPIO) pins. In general, many of the GPIO pins have
multiple functions that can be configured by user code. By default,
the GPIO pins are configured in GPIO mode. All GPIO pins have
an internal pull-up resistor with a sink capability of 0.8 mA and
a source capability of 0.1 mA.
The nine GPIOs are grouped into three ports: Port0, Port1, and
Port2. Port0 is five bits wide. Port1 and Port2 are each two bits
wide. The GPIO assignment within each port is detailed in
Table 58. A typical GPIO structure is shown Figure 40.
OUTPUT DRIVE ENABLE
1
ONLY AVAILABLE ON GPIO_0, GPIO_5, GPIO_7, AND GPIO_8.
GPxDAT[31:24]
GPxDAT[23:16]
OUTPUT DATA
GPxDAT[7:0]
INPUT DATA
GPIO IRQ
Figure 40. Typical GPIO Structure
1
REG_DVDD
GPIO
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External interrupts are present on GPIO_0, GPIO_5, GPIO_7,
and GPIO_8. These interrupts are level triggered and active high.
These interrupts are not latched; therefore, the interrupt source
must be present until either IRQSTA or FIQSTA are interrogated.
The interrupt source must be active for at least one CD-divided
core clock to guarantee recognition.
All port pins are configured and controlled by three sets (one
set for each port) of four port-specific MMRs, as follows:
•
•
•
•
where x corresponds to the port number (0, 1, or 2).
During normal operation, user code can control the function
and state of the external GPIO pins using these general-purpose
registers. All GPIO pins retain their external level (high or low)
during power-down (POWCON) mode.
GPxCON: Portx control register
GPxDAT: Portx configuration and data register
GPxSET: Portx data set
GPxCLR: Portx data clear