CY7C68053-56BAXIT Cypress Semiconductor Corp, CY7C68053-56BAXIT Datasheet - Page 18

• Manufacturer Part Number: CY7C68053-56BAXIT
• Description: CY7C68053-56BAXIT
• Manufacturer: Cypress Semiconductor Corp
• Series: MoBL-USB™r

Specifications of CY7C68053-56BAXIT

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB
• Number Of I /o: 56
• Voltage - Supply: 1.71 V ~ 1.89 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Processor Series: CY7C68xx
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 24
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3687 - KIT DEV MOBL-USB FX2LP18
• Lead Free Status / Rohs Status: Details

Table 8. FX2LP18 Register Summary (continued)
Document # 001-06120 Rev *J
Hex
E62C
E62D
E62E
E62F
E630
H.S.
E630
F.S.
E631
H.S.
E631
F.S
E632
H.S.
E632
F.S
E633
H.S.
E633
F.S
E634
H.S.
E634
F.S
E635
H.S.
E635
F.S
E636
H.S.
E636
F.S
E637
H.S.
E637
F.S
E640
E641
E642
E643
E644
E648
E649
E650
E651
E652
E653
E654
E655
E656
E657
E658
E659
E65A
E65B
E65C
E65D
Note
11. The register can only be reset, it cannot be set.
Size Name
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
1
1
1
1
4
1
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ECC1B2
ECC2B0
ECC2B1
ECC2B2
EP2FIFOPFH
EP2FIFOPFH
EP2FIFOPFL
EP2FIFOPFL
EP4FIFOPFH
EP4FIFOPFH
EP4FIFOPFL
EP4FIFOPFL
EP6FIFOPFH
EP6FIFOPFH
EP6FIFOPFL
EP6FIFOPFL
EP8FIFOPFH
EP8FIFOPFH
EP8FIFOPFL
EP8FIFOPFL
Reserved
EP2ISOINPKTS
EP4ISOINPKTS
EP6ISOINPKTS
EP8ISOINPKTS
Reserved
INPKTEND
OUTPKTEND
INTERRUPTS
EP2FIFOIE
EP2FIFOIRQ
EP4FIFOIE
EP4FIFOIRQ
EP6FIFOIE
EP6FIFOIRQ
EP8FIFOIE
EP8FIFOIRQ
IBNIE
IBNIRQ
NAKIE
NAKIRQ
USBIE
USBIRQ
[11]
[11]
[11]
[10]
[10]
[10]
[10]
[10]
[10,11]
[10,11]
[10,11]
[10,11]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
Description
ECC1 Byte 2 address
ECC2 Byte 0 address
ECC2 Byte 1 address
ECC2 Byte 2 address
Endpoint 2/Slave FIFO
programmable flag H
Endpoint 2/Slave FIFO
programmable flag H
Endpoint 2/Slave FIFO
programmable flag L
Endpoint 2/Slave FIFO
programmable flag L
Endpoint 4/Slave FIFO
programmable flag H
Endpoint 4/Slave FIFO
programmable flag H
Endpoint 4/Slave FIFO
programmable flag L
Endpoint 4/Slave FIFO
programmable flag L
Endpoint 6/Slave FIFO
programmable flag H
Endpoint 6/Slave FIFO
programmable flag H
Endpoint 6/Slave FIFO
programmable flag L
Endpoint 6/Slave FIFO
programmable flag L
Endpoint 8/Slave FIFO
programmable flag H
Endpoint 8/Slave FIFO
programmable flag H
Endpoint 8/Slave FIFO
programmable flag L
Endpoint 8/Slave FIFO
programmable flag L
EP2 (if ISO) IN packets per
frame (1-3)
EP4 (if ISO) IN packets per
frame (1-3)
EP6 (if ISO) IN packets per
frame (1-3)
EP8 (if ISO) IN packets per
frame (1-3)
Force IN packet end
Force OUT packet end
Endpoint 2 Slave FIFO flag
interrupt enable
Endpoint 2 Slave FIFO flag
interrupt request
Endpoint 4 Slave FIFO flag
interrupt enable
Endpoint 4 Slave FIFO flag
interrupt request
Endpoint 6 Slave FIFO flag
interrupt enable
Endpoint 6 Slave FIFO flag
interrupt request
Endpoint 8 Slave FIFO flag
interrupt enable
Endpoint 8 Slave FIFO flag
interrupt request
IN-BULK-NAK interrupt
enable
IN-BULK-NAK interrupt
request
Endpoint Ping-NAK/IBN
interrupt enable
Endpoint Ping-NAK/IBN
interrupt request
USB interrupt enables
USB interrupt requests
IN: PKTS[1]
IN: PKTS[1]
IN:PKTS[1]
IN:PKTS[1]
OUT:PFC7
OUT:PFC7
OUT:PFC7
OUT:PFC7
LINE15
DECIS
DECIS
DECIS
DECIS
DECIS
DECIS
DECIS
DECIS
COL5
LINE7
COL5
PFC7
PFC7
PFC7
PFC7
AADJ
AADJ
AADJ
AADJ
Skip
Skip
EP8
EP8
b7
0
0
0
0
0
0
0
0
0
0
0
0
IN: PKTS[0]
IN: PKTS[0]
IN:PKTS[0]
IN:PKTS[0]
OUT:PFC6
OUT:PFC6
OUT:PFC6
OUT:PFC6
PKTSTAT
PKTSTAT
PKTSTAT
PKTSTAT
PKTSTAT
PKTSTAT
PKTSTAT
PKTSTAT
EP0ACK
EP0ACK
LINE14
LINE6
COL4
COL4
PFC6
PFC6
PFC6
PFC6
EP6
EP6
b6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10
IN:PKTS[2]
IN:PKTS[2]
HSGRANT
HSGRANT
LINE13
LINE5
COL3
COL3
PFC5
PFC5
PFC5
PFC5
PFC5
PFC5
PFC5
PFC5
EP8
EP8
EP4
EP4
b5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT:PFC11
IN: PKTS[1]
OUT:PFC10
OUT:PFC10
OUT:PFC11
IN: PKTS[1]
OUT:PFC10
OUT:PFC10
IN:PKTS[1]
IN:PKTS[1]
LINE12
LINE4
URES
URES
COL2
COL2
PFC4
PFC4
PFC4
PFC4
PFC4
PFC4
PFC4
PFC4
EP6
EP6
EP2
EP2
b4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT:PFC10
IN: PKTS[0]
OUT:PFC10
IN: PKTS[0]
IN:PKTS[0]
IN:PKTS[0]
OUT:PFC9
OUT:PFC9
OUT:PFC9
OUT:PFC9
EDGEPF
EDGEPF
EDGEPF
EDGEPF
LINE11
LINE3
SUSP
SUSP
COL1
COL1
PFC3
PFC3
PFC3
PFC3
PFC3
PFC3
PFC3
PFC3
EP3
EP3
EP4
EP4
EP1
EP1
b3
0
0
0
0
0
0
0
0
SUTOK
SUTOK
LINE10
LINE2
COL0
COL0
PFC2
PFC2
PFC2
PFC2
PFC2
PFC2
PFC2
PFC2
EP2
EP2
EP2
EP2
EP0
EP0
PF
PF
PF
PF
PF
PF
PF
PF
b2
0
0
0
0
0
0
0
0
0
0
0
0
INPPF1
INPPF1
INPPF1
INPPF1
LINE17
LINE9
LINE1
PFC9
PFC9
PFC1
PFC1
PFC1
PFC1
PFC9
PFC9
PFC1
PFC1
PFC1
PFC1
SOF
SOF
EP1
EP1
EP1
EP1
b1
EF
EF
EF
EF
EF
EF
EF
EF
0
0
0
0
0
0
0
IN:PKTS[2]
IN:PKTS[2]
OUT:PFC8
OUT:PFC8
INPPF0
INPPF0
INPPF0
INPPF0
LINE16
SUDAV
SUDAV
LINE8
LINE0
PFC8
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
PFC8
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
CY7C68053
EP0
EP0
EP0
EP0
IBN
IBN
b0
FF
FF
FF
FF
FF
FF
FF
FF
0
Page 18 of 42
Default
00000000 R
00000000 R
00000000 R
00000000 R
10001000 bbbbbrbb
10001000 bbbbbrbb
00000000 RW
00000000 RW
10001000 bbrbbrrb
10001000 bbrbbrrb
00000000 RW
00000000 RW
00001000 bbbbbrbb
00001000 bbbbbrbb
00000000 RW
00000000 RW
00001000 bbrbbrrb
00001000 bbrbbrrb
00000000 RW
00000000 RW
00000001 brrrrrbb
00000001 brrrrrrr
00000001 brrrrrbb
00000001 brrrrrrr
xxxxxxxx W
xxxxxxxx W
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00xxxxxx rrbbbbbb
00000000 RW
xxxxxx0x bbbbbbrb
00000000 RW
0xxxxxxx rbbbbbbb
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