CY7C68053-56BAXIT Cypress Semiconductor Corp, CY7C68053-56BAXIT Datasheet - Page 41

• Manufacturer Part Number: CY7C68053-56BAXIT
• Description: CY7C68053-56BAXIT
• Manufacturer: Cypress Semiconductor Corp
• Series: MoBL-USB™r

Specifications of CY7C68053-56BAXIT

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB
• Number Of I /o: 56
• Voltage - Supply: 1.71 V ~ 1.89 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Processor Series: CY7C68xx
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 24
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3687 - KIT DEV MOBL-USB FX2LP18
• Lead Free Status / Rohs Status: Details

Document History Page
Document # 001-06120 Rev *J
Revision
Document Title: CY7C68053 MoBL-USB™ FX2LP18 USB Microcontroller
Document Number: 001-06120
*G
*A
*B
*C
*D
*E
*F
*H
*J
**
*I
1128404
1349903
2728476
3072698
430449
434754
465471
484726
492009
500408
502115
ECN
OSG/ARI
Change
Orig. of
AESA
OSG
OSG
OSG
OSG
OSG
OSG
ODC
ODC
ARI
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
03/03/06
03/24/06
07/02/09
10/27/10
Date
New data sheet
In Section 3.3, stated that SCL and SDA pins can be connected to V
Chnged sections 3.5, 3.18.1 and pin descriptions of SCL, SDA to indicate that
since DISCON=1 after reset, an EEPROM or EEPROM emulation is required on
the I
In pin description table, renamed pin 2H (Reserved) to Ground
In Section 6, added statement “The GPIO’s are not over voltage tolerant, except
the SCL and SDA pins, which are 3.3 V tolerant“
In Section 8,added a footnote to the DC char table stating that AVcc can be
floated in low power mode
In Section 8, changed V
Changed the recommendation for the pull up resistors on I
Split Icc into 4 different values, corresponding to the different voltage supplies
Changed Isus typical to 20uA and 220uA
Added section 3.9.3 on suspend current considerations
Removed all references the part number CY7C68055. Corrected the bullet in
Features to state that 24 GPIO’s are available. Added the Test ID (TID#) to the
Features on the front page. Made changes to the block diagram on the first page
(this is now a Visio drawing instead of a Framemaker drawing). Corrected the
Ambient Temperature with Power Supplied. Moved figure titles to meet the new
template. Checked grammar. Took out 9-bit address bus from the block diagram
on the first page. Corrected Figure 4.1
Added Icc data in DC Characteristics and Maximum Power dissipation
Changed ESD spec to 1500 V
Changed ESD spec to 2000 V and 1500 V only for SCL and SDA pins.
Added min spec for t
Changed Icc and power dissipation numbers
Removed SLCS from figure in Section 9.6 Slave FIFO Asynchronous Write
Changed SLWR Pulse HIGH parameter to 50ns
Section 9.13.1 9 V Removed the indication that SLCS and SLRD can be asserted
together
Section 9.13.3 - Removed the indication that SLCS and SLRD can be asserted
together
Implemented the latest template.
Section 7 - Changed -0°C to -40°C
Deleted Note on AVcc parameter in DC Characteristics table
Template update and styles update.
Included Table of Contents, Ordering Code Definitions, Acronyms, and Units of
measure.
Updated package diagram revision from *B to *C.
2
C interface
OEoff
IH
max in DC char table from 3.6 V to V
Description of Change
2
C
CY7C68053
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